Update aom to v1.0.0

Update aom to commit id d14c5bb4f336ef1842046089849dee4a301fbbf0.

1 files changed, 29 insertions, 353 deletions

diff --git a/third_party/aom/av1/common/av1_inv_txfm1d_cfg.h b/third_party/aom/av1/common/av1_inv_txfm1d_cfg.h
index 8bcf84e05..4c600f756 100644
--- a/third_party/aom/av1/common/av1_inv_txfm1d_cfg.h
+++ b/third_party/aom/av1/common/av1_inv_txfm1d_cfg.h
@@ -14,358 +14,34 @@
 #include "av1/common/av1_inv_txfm1d.h"
 
 // sum of fwd_shift_##
-#if CONFIG_CHROMA_2X2
-#if CONFIG_TX64X64
-static const int8_t fwd_shift_sum[TX_SIZES] = { 3, 2, 1, 0, -2, -4 };
-#else   // CONFIG_TX64X64
-static const int8_t fwd_shift_sum[TX_SIZES] = { 3, 2, 1, 0, -2 };
-#endif  // CONFIG_TX64X64
-#else   // CONFIG_CHROMA_2X2
-#if CONFIG_TX64X64
-static const int8_t fwd_shift_sum[TX_SIZES] = { 2, 1, 0, -2, -4 };
-#else  // CONFIG_TX64X64
-static const int8_t fwd_shift_sum[TX_SIZES] = { 2, 1, 0, -2 };
-#endif  // CONFIG_TX64X64
-#endif  // CONFIG_CHROMA_2X2
+static const int8_t inv_start_range[TX_SIZES_ALL] = {
+  5,  // 4x4 transform
+  6,  // 8x8 transform
+  7,  // 16x16 transform
+  7,  // 32x32 transform
+  7,  // 64x64 transform
+  5,  // 4x8 transform
+  5,  // 8x4 transform
+  6,  // 8x16 transform
+  6,  // 16x8 transform
+  6,  // 16x32 transform
+  6,  // 32x16 transform
+  6,  // 32x64 transform
+  6,  // 64x32 transform
+  6,  // 4x16 transform
+  6,  // 16x4 transform
+  7,  // 8x32 transform
+  7,  // 32x8 transform
+  7,  // 16x64 transform
+  7,  // 64x16 transform
+};
+
+extern const int8_t *inv_txfm_shift_ls[TX_SIZES_ALL];
+
+// Values in both inv_cos_bit_col and inv_cos_bit_row are always 12
+// for each valid row and col combination
+#define INV_COS_BIT 12
+extern const int8_t inv_cos_bit_col[5 /*row*/][5 /*col*/];
+extern const int8_t inv_cos_bit_row[5 /*row*/][5 /*col*/];
 
-//  ---------------- 4x4 1D config -----------------------
-// shift
-static const int8_t inv_shift_4[2] = { 0, -4 };
-
-// stage range
-static const int8_t inv_stage_range_col_dct_4[4] = { 3, 3, 2, 2 };
-static const int8_t inv_stage_range_row_dct_4[4] = { 3, 3, 3, 3 };
-static const int8_t inv_stage_range_col_adst_4[6] = { 3, 3, 3, 3, 2, 2 };
-static const int8_t inv_stage_range_row_adst_4[6] = { 3, 3, 3, 3, 3, 3 };
-static const int8_t inv_stage_range_idx_4[1] = { 0 };
-
-// cos bit
-static const int8_t inv_cos_bit_col_dct_4[4] = { 13, 13, 13, 13 };
-static const int8_t inv_cos_bit_row_dct_4[4] = { 13, 13, 13, 13 };
-static const int8_t inv_cos_bit_col_adst_4[6] = { 13, 13, 13, 13, 13, 13 };
-static const int8_t inv_cos_bit_row_adst_4[6] = { 13, 13, 13, 13, 13, 13 };
-
-//  ---------------- 8x8 1D constants -----------------------
-// shift
-static const int8_t inv_shift_8[2] = { 0, -5 };
-
-// stage range
-static const int8_t inv_stage_range_col_dct_8[6] = { 5, 5, 5, 5, 4, 4 };
-static const int8_t inv_stage_range_row_dct_8[6] = { 5, 5, 5, 5, 5, 5 };
-static const int8_t inv_stage_range_col_adst_8[8] = { 5, 5, 5, 5, 5, 5, 4, 4 };
-static const int8_t inv_stage_range_row_adst_8[8] = { 5, 5, 5, 5, 5, 5, 5, 5 };
-static const int8_t inv_stage_range_idx_8[1] = { 0 };
-
-// cos bit
-static const int8_t inv_cos_bit_col_dct_8[6] = { 13, 13, 13, 13, 13, 13 };
-static const int8_t inv_cos_bit_row_dct_8[6] = { 13, 13, 13, 13, 13, 13 };
-static const int8_t inv_cos_bit_col_adst_8[8] = {
-  13, 13, 13, 13, 13, 13, 13, 13
-};
-static const int8_t inv_cos_bit_row_adst_8[8] = {
-  13, 13, 13, 13, 13, 13, 13, 13
-};
-
-//  ---------------- 16x16 1D constants -----------------------
-// shift
-static const int8_t inv_shift_16[2] = { -1, -5 };
-
-// stage range
-static const int8_t inv_stage_range_col_dct_16[8] = { 7, 7, 7, 7, 7, 7, 6, 6 };
-static const int8_t inv_stage_range_row_dct_16[8] = { 7, 7, 7, 7, 7, 7, 7, 7 };
-static const int8_t inv_stage_range_col_adst_16[10] = { 7, 7, 7, 7, 7,
-                                                        7, 7, 7, 6, 6 };
-static const int8_t inv_stage_range_row_adst_16[10] = { 7, 7, 7, 7, 7,
-                                                        7, 7, 7, 7, 7 };
-static const int8_t inv_stage_range_idx_16[1] = { 0 };
-
-// cos bit
-static const int8_t inv_cos_bit_col_dct_16[8] = {
-  13, 13, 13, 13, 13, 13, 13, 13
-};
-static const int8_t inv_cos_bit_row_dct_16[8] = {
-  12, 12, 12, 12, 12, 12, 12, 12
-};
-static const int8_t inv_cos_bit_col_adst_16[10] = { 13, 13, 13, 13, 13,
-                                                    13, 13, 13, 13, 13 };
-static const int8_t inv_cos_bit_row_adst_16[10] = { 12, 12, 12, 12, 12,
-                                                    12, 12, 12, 12, 12 };
-
-//  ---------------- 32x32 1D constants -----------------------
-// shift
-static const int8_t inv_shift_32[2] = { -1, -5 };
-
-// stage range
-static const int8_t inv_stage_range_col_dct_32[10] = { 9, 9, 9, 9, 9,
-                                                       9, 9, 9, 8, 8 };
-static const int8_t inv_stage_range_row_dct_32[10] = { 9, 9, 9, 9, 9,
-                                                       9, 9, 9, 9, 9 };
-static const int8_t inv_stage_range_col_adst_32[12] = { 9, 9, 9, 9, 9, 9,
-                                                        9, 9, 9, 9, 8, 8 };
-static const int8_t inv_stage_range_row_adst_32[12] = { 9, 9, 9, 9, 9, 9,
-                                                        9, 9, 9, 9, 9, 9 };
-static const int8_t inv_stage_range_idx_32[1] = { 0 };
-
-// cos bit
-static const int8_t inv_cos_bit_col_dct_32[10] = { 13, 13, 13, 13, 13,
-                                                   13, 13, 13, 13, 13 };
-static const int8_t inv_cos_bit_row_dct_32[10] = { 12, 12, 12, 12, 12,
-                                                   12, 12, 12, 12, 12 };
-static const int8_t inv_cos_bit_col_adst_32[12] = { 13, 13, 13, 13, 13, 13,
-                                                    13, 13, 13, 13, 13, 13 };
-static const int8_t inv_cos_bit_row_adst_32[12] = { 12, 12, 12, 12, 12, 12,
-                                                    12, 12, 12, 12, 12, 12 };
-
-//  ---------------- 64x64 1D constants -----------------------
-// shift
-static const int8_t inv_shift_64[2] = { -1, -5 };
-
-// stage range
-static const int8_t inv_stage_range_col_dct_64[12] = { 11, 11, 11, 11, 11, 11,
-                                                       11, 11, 11, 11, 10, 10 };
-static const int8_t inv_stage_range_row_dct_64[12] = { 11, 11, 11, 11, 11, 11,
-                                                       11, 11, 11, 11, 11, 11 };
-
-static const int8_t inv_stage_range_idx_64[1] = { 0 };
-
-// cos bit
-static const int8_t inv_cos_bit_col_dct_64[12] = { 13, 13, 13, 13, 13, 13,
-                                                   13, 13, 13, 13, 13, 13 };
-static const int8_t inv_cos_bit_row_dct_64[12] = { 12, 12, 12, 12, 12, 12,
-                                                   12, 12, 12, 12, 12, 12 };
-
-//  ---------------- row config inv_dct_4 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_row_cfg_dct_4 = {
-  4,                          // .txfm_size
-  4,                          // .stage_num
-  inv_shift_4,                // .shift
-  inv_stage_range_row_dct_4,  // .stage_range
-  inv_cos_bit_row_dct_4,      // .cos_bit
-  TXFM_TYPE_DCT4              // .txfm_type
-};
-
-//  ---------------- row config inv_dct_8 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_row_cfg_dct_8 = {
-  8,                          // .txfm_size
-  6,                          // .stage_num
-  inv_shift_8,                // .shift
-  inv_stage_range_row_dct_8,  // .stage_range
-  inv_cos_bit_row_dct_8,      // .cos_bit_
-  TXFM_TYPE_DCT8              // .txfm_type
-};
-//  ---------------- row config inv_dct_16 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_row_cfg_dct_16 = {
-  16,                          // .txfm_size
-  8,                           // .stage_num
-  inv_shift_16,                // .shift
-  inv_stage_range_row_dct_16,  // .stage_range
-  inv_cos_bit_row_dct_16,      // .cos_bit
-  TXFM_TYPE_DCT16              // .txfm_type
-};
-
-//  ---------------- row config inv_dct_32 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_row_cfg_dct_32 = {
-  32,                          // .txfm_size
-  10,                          // .stage_num
-  inv_shift_32,                // .shift
-  inv_stage_range_row_dct_32,  // .stage_range
-  inv_cos_bit_row_dct_32,      // .cos_bit_row
-  TXFM_TYPE_DCT32              // .txfm_type
-};
-
-#if CONFIG_TX64X64
-//  ---------------- row config inv_dct_64 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_row_cfg_dct_64 = {
-  64,                          // .txfm_size
-  12,                          // .stage_num
-  inv_shift_64,                // .shift
-  inv_stage_range_row_dct_64,  // .stage_range
-  inv_cos_bit_row_dct_64,      // .cos_bit
-  TXFM_TYPE_DCT64,             // .txfm_type_col
-};
-#endif  // CONFIG_TX64X64
-
-//  ---------------- row config inv_adst_4 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_row_cfg_adst_4 = {
-  4,                           // .txfm_size
-  6,                           // .stage_num
-  inv_shift_4,                 // .shift
-  inv_stage_range_row_adst_4,  // .stage_range
-  inv_cos_bit_row_adst_4,      // .cos_bit
-  TXFM_TYPE_ADST4,             // .txfm_type
-};
-
-//  ---------------- row config inv_adst_8 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_row_cfg_adst_8 = {
-  8,                           // .txfm_size
-  8,                           // .stage_num
-  inv_shift_8,                 // .shift
-  inv_stage_range_row_adst_8,  // .stage_range
-  inv_cos_bit_row_adst_8,      // .cos_bit
-  TXFM_TYPE_ADST8,             // .txfm_type_col
-};
-
-//  ---------------- row config inv_adst_16 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_row_cfg_adst_16 = {
-  16,                           // .txfm_size
-  10,                           // .stage_num
-  inv_shift_16,                 // .shift
-  inv_stage_range_row_adst_16,  // .stage_range
-  inv_cos_bit_row_adst_16,      // .cos_bit
-  TXFM_TYPE_ADST16,             // .txfm_type
-};
-
-//  ---------------- row config inv_adst_32 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_row_cfg_adst_32 = {
-  32,                           // .txfm_size
-  12,                           // .stage_num
-  inv_shift_32,                 // .shift
-  inv_stage_range_row_adst_32,  // .stage_range
-  inv_cos_bit_row_adst_32,      // .cos_bit
-  TXFM_TYPE_ADST32,             // .txfm_type
-};
-
-//  ---------------- col config inv_dct_4 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_4 = {
-  4,                          // .txfm_size
-  4,                          // .stage_num
-  inv_shift_4,                // .shift
-  inv_stage_range_col_dct_4,  // .stage_range
-  inv_cos_bit_col_dct_4,      // .cos_bit
-  TXFM_TYPE_DCT4              // .txfm_type
-};
-
-//  ---------------- col config inv_dct_8 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_8 = {
-  8,                          // .txfm_size
-  6,                          // .stage_num
-  inv_shift_8,                // .shift
-  inv_stage_range_col_dct_8,  // .stage_range
-  inv_cos_bit_col_dct_8,      // .cos_bit_
-  TXFM_TYPE_DCT8              // .txfm_type
-};
-//  ---------------- col config inv_dct_16 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_16 = {
-  16,                          // .txfm_size
-  8,                           // .stage_num
-  inv_shift_16,                // .shift
-  inv_stage_range_col_dct_16,  // .stage_range
-  inv_cos_bit_col_dct_16,      // .cos_bit
-  TXFM_TYPE_DCT16              // .txfm_type
-};
-
-//  ---------------- col config inv_dct_32 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_32 = {
-  32,                          // .txfm_size
-  10,                          // .stage_num
-  inv_shift_32,                // .shift
-  inv_stage_range_col_dct_32,  // .stage_range
-  inv_cos_bit_col_dct_32,      // .cos_bit_col
-  TXFM_TYPE_DCT32              // .txfm_type
-};
-
-//  ---------------- col config inv_dct_64 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_64 = {
-  64,                          // .txfm_size
-  12,                          // .stage_num
-  inv_shift_64,                // .shift
-  inv_stage_range_col_dct_64,  // .stage_range
-  inv_cos_bit_col_dct_64,      // .cos_bit
-  TXFM_TYPE_DCT64,             // .txfm_type_col
-};
-
-//  ---------------- col config inv_adst_4 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_4 = {
-  4,                           // .txfm_size
-  6,                           // .stage_num
-  inv_shift_4,                 // .shift
-  inv_stage_range_col_adst_4,  // .stage_range
-  inv_cos_bit_col_adst_4,      // .cos_bit
-  TXFM_TYPE_ADST4,             // .txfm_type
-};
-
-//  ---------------- col config inv_adst_8 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_8 = {
-  8,                           // .txfm_size
-  8,                           // .stage_num
-  inv_shift_8,                 // .shift
-  inv_stage_range_col_adst_8,  // .stage_range
-  inv_cos_bit_col_adst_8,      // .cos_bit
-  TXFM_TYPE_ADST8,             // .txfm_type_col
-};
-
-//  ---------------- col config inv_adst_16 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_16 = {
-  16,                           // .txfm_size
-  10,                           // .stage_num
-  inv_shift_16,                 // .shift
-  inv_stage_range_col_adst_16,  // .stage_range
-  inv_cos_bit_col_adst_16,      // .cos_bit
-  TXFM_TYPE_ADST16,             // .txfm_type
-};
-
-//  ---------------- col config inv_adst_32 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_32 = {
-  32,                           // .txfm_size
-  12,                           // .stage_num
-  inv_shift_32,                 // .shift
-  inv_stage_range_col_adst_32,  // .stage_range
-  inv_cos_bit_col_adst_32,      // .cos_bit
-  TXFM_TYPE_ADST32,             // .txfm_type
-};
-
-#if CONFIG_EXT_TX
-// identity does not need to differentiate between row and col
-//  ---------------- row/col config inv_identity_4 ----------
-static const TXFM_1D_CFG inv_txfm_1d_cfg_identity_4 = {
-  4,                      // .txfm_size
-  1,                      // .stage_num
-  inv_shift_4,            // .shift
-  inv_stage_range_idx_4,  // .stage_range
-  NULL,                   // .cos_bit
-  TXFM_TYPE_IDENTITY4,    // .txfm_type
-};
-
-//  ---------------- row/col config inv_identity_8 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_cfg_identity_8 = {
-  8,                      // .txfm_size
-  1,                      // .stage_num
-  inv_shift_8,            // .shift
-  inv_stage_range_idx_8,  // .stage_range
-  NULL,                   // .cos_bit
-  TXFM_TYPE_IDENTITY8,    // .txfm_type
-};
-
-//  ---------------- row/col config inv_identity_16 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_cfg_identity_16 = {
-  16,                      // .txfm_size
-  1,                       // .stage_num
-  inv_shift_16,            // .shift
-  inv_stage_range_idx_16,  // .stage_range
-  NULL,                    // .cos_bit
-  TXFM_TYPE_IDENTITY16,    // .txfm_type
-};
-
-//  ---------------- row/col config inv_identity_32 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_cfg_identity_32 = {
-  32,                      // .txfm_size
-  1,                       // .stage_num
-  inv_shift_32,            // .shift
-  inv_stage_range_idx_32,  // .stage_range
-  NULL,                    // .cos_bit
-  TXFM_TYPE_IDENTITY32,    // .txfm_type
-};
-
-#if CONFIG_TX64X64
-//  ---------------- row/col config inv_identity_32 ----------------
-static const TXFM_1D_CFG inv_txfm_1d_cfg_identity_64 = {
-  64,                      // .txfm_size
-  1,                       // .stage_num
-  inv_shift_64,            // .shift
-  inv_stage_range_idx_64,  // .stage_range
-  NULL,                    // .cos_bit
-  TXFM_TYPE_IDENTITY64,    // .txfm_type
-};
-#endif  // CONFIG_TX64X64
-#endif  // CONFIG_EXT_TX
 #endif  // AV1_INV_TXFM2D_CFG_H_