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authorwolfbeast <mcwerewolf@gmail.com>2018-11-01 10:33:07 +0100
committerwolfbeast <mcwerewolf@gmail.com>2018-11-01 10:33:07 +0100
commit24a83a813641a6500e91f9fcf1ea3ca0aecc047a (patch)
tree5aeea294acacf04bc74a8d947521d05995c8ddf8 /js/src/jit/x86
parenta2a8c71d7774858db67f51b9c475c5b1d4e43e8f (diff)
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Simplify SIMD conversion from Uint64 to Double.
Diffstat (limited to 'js/src/jit/x86')
-rw-r--r--js/src/jit/x86/Assembler-x86.h13
-rw-r--r--js/src/jit/x86/BaseAssembler-x86.h8
-rw-r--r--js/src/jit/x86/MacroAssembler-x86.cpp31
3 files changed, 21 insertions, 31 deletions
diff --git a/js/src/jit/x86/Assembler-x86.h b/js/src/jit/x86/Assembler-x86.h
index 3fb5efaff..5939583d9 100644
--- a/js/src/jit/x86/Assembler-x86.h
+++ b/js/src/jit/x86/Assembler-x86.h
@@ -421,20 +421,11 @@ class Assembler : public AssemblerX86Shared
MOZ_ASSERT(dest.size() == 16);
masm.vhaddpd_rr(src.encoding(), dest.encoding());
}
- void vsubpd(const Operand& src1, FloatRegister src0, FloatRegister dest) {
+ void vsubpd(FloatRegister src1, FloatRegister src0, FloatRegister dest) {
MOZ_ASSERT(HasSSE2());
MOZ_ASSERT(src0.size() == 16);
MOZ_ASSERT(dest.size() == 16);
- switch (src1.kind()) {
- case Operand::MEM_REG_DISP:
- masm.vsubpd_mr(src1.disp(), src1.base(), src0.encoding(), dest.encoding());
- break;
- case Operand::MEM_ADDRESS32:
- masm.vsubpd_mr(src1.address(), src0.encoding(), dest.encoding());
- break;
- default:
- MOZ_CRASH("unexpected operand kind");
- }
+ masm.vsubpd_rr(src1.encoding(), src0.encoding(), dest.encoding());
}
void vpunpckldq(FloatRegister src1, FloatRegister src0, FloatRegister dest) {
diff --git a/js/src/jit/x86/BaseAssembler-x86.h b/js/src/jit/x86/BaseAssembler-x86.h
index 5b16311d0..caaef3f82 100644
--- a/js/src/jit/x86/BaseAssembler-x86.h
+++ b/js/src/jit/x86/BaseAssembler-x86.h
@@ -152,14 +152,6 @@ class BaseAssemblerX86 : public BaseAssembler
{
twoByteOpSimd("vsubpd", VEX_PD, OP2_SUBPS_VpsWps, src1, src0, dst);
}
- void vsubpd_mr(int32_t offset, RegisterID base, XMMRegisterID src0, XMMRegisterID dst)
- {
- twoByteOpSimd("vsubpd", VEX_PD, OP2_SUBPS_VpsWps, offset, base, src0, dst);
- }
- void vsubpd_mr(const void* address, XMMRegisterID src0, XMMRegisterID dst)
- {
- twoByteOpSimd("vsubpd", VEX_PD, OP2_SUBPS_VpsWps, address, src0, dst);
- }
void vpunpckldq_rr(XMMRegisterID src1, XMMRegisterID src0, XMMRegisterID dst) {
twoByteOpSimd("vpunpckldq", VEX_PD, OP2_PUNPCKLDQ, src1, src0, dst);
diff --git a/js/src/jit/x86/MacroAssembler-x86.cpp b/js/src/jit/x86/MacroAssembler-x86.cpp
index dc97b5b5b..429a71fa9 100644
--- a/js/src/jit/x86/MacroAssembler-x86.cpp
+++ b/js/src/jit/x86/MacroAssembler-x86.cpp
@@ -21,15 +21,6 @@
using namespace js;
using namespace js::jit;
-// vpunpckldq requires 16-byte boundary for memory operand.
-// See convertUInt64ToDouble for the details.
-MOZ_ALIGNED_DECL(static const uint64_t, 16) TO_DOUBLE[4] = {
- 0x4530000043300000LL,
- 0x0LL,
- 0x4330000000000000LL,
- 0x4530000000000000LL
-};
-
static const double TO_DOUBLE_HIGH_SCALE = 0x100000000;
bool
@@ -90,8 +81,16 @@ MacroAssemblerX86::convertUInt64ToDouble(Register64 src, FloatRegister dest, Reg
// here, each 64-bit part of dest represents following double:
// HI(dest) = 0x 1.00000HHHHHHHH * 2**84 == 2**84 + 0x HHHHHHHH 00000000
// LO(dest) = 0x 1.00000LLLLLLLL * 2**52 == 2**52 + 0x 00000000 LLLLLLLL
- movePtr(ImmWord((uintptr_t)TO_DOUBLE), temp);
- vpunpckldq(Operand(temp, 0), dest128, dest128);
+ // See convertUInt64ToDouble for the details.
+ static const int32_t CST1[4] = {
+ 0x43300000,
+ 0x45300000,
+ 0x0,
+ 0x0,
+ };
+
+ loadConstantSimd128Int(SimdConstant::CreateX4(CST1), ScratchSimd128Reg);
+ vpunpckldq(ScratchSimd128Reg, dest128, dest128);
// Subtract a constant C2 from dest, for each 64-bit part:
// C2 = 0x 45300000 00000000 43300000 00000000
@@ -101,7 +100,15 @@ MacroAssemblerX86::convertUInt64ToDouble(Register64 src, FloatRegister dest, Reg
// after the operation each 64-bit part of dest represents following:
// HI(dest) = double(0x HHHHHHHH 00000000)
// LO(dest) = double(0x 00000000 LLLLLLLL)
- vsubpd(Operand(temp, sizeof(uint64_t) * 2), dest128, dest128);
+ static const int32_t CST2[4] = {
+ 0x0,
+ 0x43300000,
+ 0x0,
+ 0x45300000,
+ };
+
+ loadConstantSimd128Int(SimdConstant::CreateX4(CST2), ScratchSimd128Reg);
+ vsubpd(ScratchSimd128Reg, dest128, dest128);
// Add HI(dest) and LO(dest) in double and store it into LO(dest),
// LO(dest) = double(0x HHHHHHHH 00000000) + double(0x 00000000 LLLLLLLL)