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authorwolfbeast <mcwerewolf@gmail.com>2018-07-11 23:29:50 +0200
committerwolfbeast <mcwerewolf@gmail.com>2018-07-11 23:31:02 +0200
commit70dd5e7c66b1fe3f82e5b4db2406050baba15f05 (patch)
tree3f012200ef3c934f33db1a4ef2b790fae3141860 /gfx/angle/src/libANGLE/renderer/d3d/WorkaroundsD3D.h
parent3b7ffb477eec078c7036c92c6a51bb5de6de4f28 (diff)
parent8481fa25d246f1968d0a254ee3c6cdd82c60781a (diff)
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Merge branch 'ANGLE-rollback'
This resolves #624 Note: Cherry-picked some fixes on top of the ANGLE version that we want to keep.
Diffstat (limited to 'gfx/angle/src/libANGLE/renderer/d3d/WorkaroundsD3D.h')
-rwxr-xr-xgfx/angle/src/libANGLE/renderer/d3d/WorkaroundsD3D.h36
1 files changed, 6 insertions, 30 deletions
diff --git a/gfx/angle/src/libANGLE/renderer/d3d/WorkaroundsD3D.h b/gfx/angle/src/libANGLE/renderer/d3d/WorkaroundsD3D.h
index ede929ce8..a2faf71d9 100755
--- a/gfx/angle/src/libANGLE/renderer/d3d/WorkaroundsD3D.h
+++ b/gfx/angle/src/libANGLE/renderer/d3d/WorkaroundsD3D.h
@@ -67,43 +67,19 @@ struct WorkaroundsD3D
// Some drivers (NVIDIA) do not take into account the base level of the texture in the results
// of the HLSL GetDimensions builtin.
bool getDimensionsIgnoresBaseLevel = false;
+
+ // In the Intel driver, data with format DXGI_FORMAT_B5G6R5_UNORM will be parsed incorrectly.
+ // This workaroud will disable B5G6R5 support when it's Intel's driver. By default, we will
+ // use R8G8B8A8 as format.
+ bool disableB5G6R5Support = false;
// On some Intel drivers, HLSL's function texture.Load returns 0 when the parameter Location
// is negative, even if the sum of Offset and Location is in range. This may cause errors when
// translating GLSL's function texelFetchOffset into texture.Load, as it is valid for
// texelFetchOffset to use negative texture coordinates as its parameter P when the sum of P
- // and Offset is in range. To work around this, we translate texelFetchOffset into texelFetch
+ // and Offset is in range. To work around this, we translatie texelFetchOffset into texelFetch
// by adding Offset directly to Location before reading the texture.
bool preAddTexelFetchOffsets = false;
-
- // On some AMD drivers, 1x1 and 2x2 mips of depth/stencil textures aren't sampled correctly.
- // We can work around this bug by doing an internal blit to a temporary single-channel texture
- // before we sample.
- bool emulateTinyStencilTextures = false;
-
- // In Intel driver, the data with format DXGI_FORMAT_B5G6R5_UNORM will be parsed incorrectly.
- // This workaroud will disable B5G6R5 support when it's Intel driver. By default, it will use
- // R8G8B8A8 format.
- bool disableB5G6R5Support = false;
-
- // On some Intel drivers, evaluating unary minus operator on integer may get wrong answer in
- // vertex shaders. To work around this bug, we translate -(int) into ~(int)+1.
- bool rewriteUnaryMinusOperator = false;
-
- // On some Intel drivers, using isnan() on highp float will get wrong answer. To work around
- // this bug, we use an expression to emulate function isnan(). Tracking bug:
- // https://crbug.com/650547
- bool emulateIsnanFloat = false;
-
- // On some Intel drivers, using clear() may not take effect. To work around this bug, we call
- // clear() twice on these platforms. Tracking bug: https://crbug.com/655534
- bool callClearTwice = false;
-
- // On some Intel drivers, copying from staging storage to constant buffer storage does not
- // seem to work. Work around this by keeping system memory storage as a canonical reference
- // for buffer data.
- // D3D11-only workaround. See http://crbug.com/593024.
- bool useSystemMemoryForConstantBuffers = false;
};
} // namespace rx