1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
|
/*
* Copyright (c) 2016, Alliance for Open Media. All rights reserved
*
* This source code is subject to the terms of the BSD 2 Clause License and
* the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
* was not distributed with this source code in the LICENSE file, you can
* obtain it at www.aomedia.org/license/software. If the Alliance for Open
* Media Patent License 1.0 was not distributed with this source code in the
* PATENTS file, you can obtain it at www.aomedia.org/license/patent.
*/
#ifndef AV1_INV_TXFM2D_CFG_H_
#define AV1_INV_TXFM2D_CFG_H_
#include "av1/common/av1_inv_txfm1d.h"
// ---------------- config inv_dct_dct_4 ----------------
static const int8_t inv_shift_dct_dct_4[2] = { 0, -4 };
static const int8_t inv_stage_range_col_dct_dct_4[4] = { 18, 18, 17, 17 };
static const int8_t inv_stage_range_row_dct_dct_4[4] = { 18, 18, 18, 18 };
static const int8_t inv_cos_bit_col_dct_dct_4[4] = { 13, 13, 13, 13 };
static const int8_t inv_cos_bit_row_dct_dct_4[4] = { 13, 13, 13, 13 };
static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_4 = {
4, // .txfm_size
4, // .stage_num_col
4, // .stage_num_row
// 0, // .log_scale
inv_shift_dct_dct_4, // .shift
inv_stage_range_col_dct_dct_4, // .stage_range_col
inv_stage_range_row_dct_dct_4, // .stage_range_row
inv_cos_bit_col_dct_dct_4, // .cos_bit_col
inv_cos_bit_row_dct_dct_4, // .cos_bit_row
TXFM_TYPE_DCT4, // .txfm_type_col
TXFM_TYPE_DCT4
}; // .txfm_type_row
// ---------------- config inv_dct_dct_8 ----------------
static const int8_t inv_shift_dct_dct_8[2] = { 0, -5 };
static const int8_t inv_stage_range_col_dct_dct_8[6] = {
19, 19, 19, 19, 18, 18
};
static const int8_t inv_stage_range_row_dct_dct_8[6] = {
19, 19, 19, 19, 19, 19
};
static const int8_t inv_cos_bit_col_dct_dct_8[6] = { 13, 13, 13, 13, 13, 13 };
static const int8_t inv_cos_bit_row_dct_dct_8[6] = { 13, 13, 13, 13, 13, 13 };
static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_8 = {
8, // .txfm_size
6, // .stage_num_col
6, // .stage_num_row
// 0, // .log_scale
inv_shift_dct_dct_8, // .shift
inv_stage_range_col_dct_dct_8, // .stage_range_col
inv_stage_range_row_dct_dct_8, // .stage_range_row
inv_cos_bit_col_dct_dct_8, // .cos_bit_col
inv_cos_bit_row_dct_dct_8, // .cos_bit_row
TXFM_TYPE_DCT8, // .txfm_type_col
TXFM_TYPE_DCT8
}; // .txfm_type_row
// ---------------- config inv_dct_dct_16 ----------------
static const int8_t inv_shift_dct_dct_16[2] = { -1, -5 };
static const int8_t inv_stage_range_col_dct_dct_16[8] = { 19, 19, 19, 19,
19, 19, 18, 18 };
static const int8_t inv_stage_range_row_dct_dct_16[8] = { 20, 20, 20, 20,
20, 20, 20, 20 };
static const int8_t inv_cos_bit_col_dct_dct_16[8] = { 13, 13, 13, 13,
13, 13, 13, 13 };
static const int8_t inv_cos_bit_row_dct_dct_16[8] = { 12, 12, 12, 12,
12, 12, 12, 12 };
static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_16 = {
16, // .txfm_size
8, // .stage_num_col
8, // .stage_num_row
// 0, // .log_scale
inv_shift_dct_dct_16, // .shift
inv_stage_range_col_dct_dct_16, // .stage_range_col
inv_stage_range_row_dct_dct_16, // .stage_range_row
inv_cos_bit_col_dct_dct_16, // .cos_bit_col
inv_cos_bit_row_dct_dct_16, // .cos_bit_row
TXFM_TYPE_DCT16, // .txfm_type_col
TXFM_TYPE_DCT16
}; // .txfm_type_row
// ---------------- config inv_dct_dct_32 ----------------
static const int8_t inv_shift_dct_dct_32[2] = { -1, -5 };
static const int8_t inv_stage_range_col_dct_dct_32[10] = { 19, 19, 19, 19, 19,
19, 19, 19, 18, 18 };
static const int8_t inv_stage_range_row_dct_dct_32[10] = { 20, 20, 20, 20, 20,
20, 20, 20, 20, 20 };
static const int8_t inv_cos_bit_col_dct_dct_32[10] = { 13, 13, 13, 13, 13,
13, 13, 13, 13, 13 };
static const int8_t inv_cos_bit_row_dct_dct_32[10] = { 12, 12, 12, 12, 12,
12, 12, 12, 12, 12 };
static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_32 = {
32, // .txfm_size
10, // .stage_num_col
10, // .stage_num_row
// 1, // .log_scale
inv_shift_dct_dct_32, // .shift
inv_stage_range_col_dct_dct_32, // .stage_range_col
inv_stage_range_row_dct_dct_32, // .stage_range_row
inv_cos_bit_col_dct_dct_32, // .cos_bit_col
inv_cos_bit_row_dct_dct_32, // .cos_bit_row
TXFM_TYPE_DCT32, // .txfm_type_col
TXFM_TYPE_DCT32
}; // .txfm_type_row
// ---------------- config inv_dct_dct_64 ----------------
static const int8_t inv_shift_dct_dct_64[2] = { -1, -7 };
static const int8_t inv_stage_range_col_dct_dct_64[12] = {
19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 18, 18
};
static const int8_t inv_stage_range_row_dct_dct_64[12] = {
20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20
};
static const int8_t inv_cos_bit_col_dct_dct_64[12] = { 13, 13, 13, 13, 13, 13,
13, 13, 13, 13, 13, 13 };
static const int8_t inv_cos_bit_row_dct_dct_64[12] = { 12, 12, 12, 12, 12, 12,
12, 12, 12, 12, 12, 12 };
static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_64 = {
64, // .txfm_size
12, // .stage_num_col
12, // .stage_num_row
inv_shift_dct_dct_64, // .shift
inv_stage_range_col_dct_dct_64, // .stage_range_col
inv_stage_range_row_dct_dct_64, // .stage_range_row
inv_cos_bit_col_dct_dct_64, // .cos_bit_col
inv_cos_bit_row_dct_dct_64, // .cos_bit_row
TXFM_TYPE_DCT64, // .txfm_type_col
TXFM_TYPE_DCT64
}; // .txfm_type_row
// ---------------- config inv_dct_adst_4 ----------------
static const int8_t inv_shift_dct_adst_4[2] = { 0, -4 };
static const int8_t inv_stage_range_col_dct_adst_4[4] = { 18, 18, 17, 17 };
static const int8_t inv_stage_range_row_dct_adst_4[6] = {
18, 18, 18, 18, 18, 18
};
static const int8_t inv_cos_bit_col_dct_adst_4[4] = { 13, 13, 13, 13 };
static const int8_t inv_cos_bit_row_dct_adst_4[6] = { 13, 13, 13, 13, 13, 13 };
static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_adst_4 = {
4, // .txfm_size
4, // .stage_num_col
6, // .stage_num_row
// 0, // .log_scale
inv_shift_dct_adst_4, // .shift
inv_stage_range_col_dct_adst_4, // .stage_range_col
inv_stage_range_row_dct_adst_4, // .stage_range_row
inv_cos_bit_col_dct_adst_4, // .cos_bit_col
inv_cos_bit_row_dct_adst_4, // .cos_bit_row
TXFM_TYPE_DCT4, // .txfm_type_col
TXFM_TYPE_ADST4
}; // .txfm_type_row
// ---------------- config inv_dct_adst_8 ----------------
static const int8_t inv_shift_dct_adst_8[2] = { 0, -5 };
static const int8_t inv_stage_range_col_dct_adst_8[6] = {
19, 19, 19, 19, 18, 18
};
static const int8_t inv_stage_range_row_dct_adst_8[8] = { 19, 19, 19, 19,
19, 19, 19, 19 };
static const int8_t inv_cos_bit_col_dct_adst_8[6] = { 13, 13, 13, 13, 13, 13 };
static const int8_t inv_cos_bit_row_dct_adst_8[8] = { 13, 13, 13, 13,
13, 13, 13, 13 };
static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_adst_8 = {
8, // .txfm_size
6, // .stage_num_col
8, // .stage_num_row
// 0, // .log_scale
inv_shift_dct_adst_8, // .shift
inv_stage_range_col_dct_adst_8, // .stage_range_col
inv_stage_range_row_dct_adst_8, // .stage_range_row
inv_cos_bit_col_dct_adst_8, // .cos_bit_col
inv_cos_bit_row_dct_adst_8, // .cos_bit_row
TXFM_TYPE_DCT8, // .txfm_type_col
TXFM_TYPE_ADST8
}; // .txfm_type_row
// ---------------- config inv_dct_adst_16 ----------------
static const int8_t inv_shift_dct_adst_16[2] = { -1, -5 };
static const int8_t inv_stage_range_col_dct_adst_16[8] = { 19, 19, 19, 19,
19, 19, 18, 18 };
static const int8_t inv_stage_range_row_dct_adst_16[10] = {
20, 20, 20, 20, 20, 20, 20, 20, 20, 20
};
static const int8_t inv_cos_bit_col_dct_adst_16[8] = { 13, 13, 13, 13,
13, 13, 13, 13 };
static const int8_t inv_cos_bit_row_dct_adst_16[10] = { 12, 12, 12, 12, 12,
12, 12, 12, 12, 12 };
static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_adst_16 = {
16, // .txfm_size
8, // .stage_num_col
10, // .stage_num_row
// 0, // .log_scale
inv_shift_dct_adst_16, // .shift
inv_stage_range_col_dct_adst_16, // .stage_range_col
inv_stage_range_row_dct_adst_16, // .stage_range_row
inv_cos_bit_col_dct_adst_16, // .cos_bit_col
inv_cos_bit_row_dct_adst_16, // .cos_bit_row
TXFM_TYPE_DCT16, // .txfm_type_col
TXFM_TYPE_ADST16
}; // .txfm_type_row
// ---------------- config inv_dct_adst_32 ----------------
static const int8_t inv_shift_dct_adst_32[2] = { -1, -5 };
static const int8_t inv_stage_range_col_dct_adst_32[10] = {
19, 19, 19, 19, 19, 19, 19, 19, 18, 18
};
static const int8_t inv_stage_range_row_dct_adst_32[12] = {
20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20
};
static const int8_t inv_cos_bit_col_dct_adst_32[10] = { 13, 13, 13, 13, 13,
13, 13, 13, 13, 13 };
static const int8_t inv_cos_bit_row_dct_adst_32[12] = {
12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12
};
static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_adst_32 = {
32, // .txfm_size
10, // .stage_num_col
12, // .stage_num_row
// 1, // .log_scale
inv_shift_dct_adst_32, // .shift
inv_stage_range_col_dct_adst_32, // .stage_range_col
inv_stage_range_row_dct_adst_32, // .stage_range_row
inv_cos_bit_col_dct_adst_32, // .cos_bit_col
inv_cos_bit_row_dct_adst_32, // .cos_bit_row
TXFM_TYPE_DCT32, // .txfm_type_col
TXFM_TYPE_ADST32
}; // .txfm_type_row
// ---------------- config inv_adst_adst_4 ----------------
static const int8_t inv_shift_adst_adst_4[2] = { 0, -4 };
static const int8_t inv_stage_range_col_adst_adst_4[6] = { 18, 18, 18,
18, 17, 17 };
static const int8_t inv_stage_range_row_adst_adst_4[6] = { 18, 18, 18,
18, 18, 18 };
static const int8_t inv_cos_bit_col_adst_adst_4[6] = { 13, 13, 13, 13, 13, 13 };
static const int8_t inv_cos_bit_row_adst_adst_4[6] = { 13, 13, 13, 13, 13, 13 };
static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_adst_4 = {
4, // .txfm_size
6, // .stage_num_col
6, // .stage_num_row
// 0, // .log_scale
inv_shift_adst_adst_4, // .shift
inv_stage_range_col_adst_adst_4, // .stage_range_col
inv_stage_range_row_adst_adst_4, // .stage_range_row
inv_cos_bit_col_adst_adst_4, // .cos_bit_col
inv_cos_bit_row_adst_adst_4, // .cos_bit_row
TXFM_TYPE_ADST4, // .txfm_type_col
TXFM_TYPE_ADST4
}; // .txfm_type_row
// ---------------- config inv_adst_adst_8 ----------------
static const int8_t inv_shift_adst_adst_8[2] = { 0, -5 };
static const int8_t inv_stage_range_col_adst_adst_8[8] = { 19, 19, 19, 19,
19, 19, 18, 18 };
static const int8_t inv_stage_range_row_adst_adst_8[8] = { 19, 19, 19, 19,
19, 19, 19, 19 };
static const int8_t inv_cos_bit_col_adst_adst_8[8] = { 13, 13, 13, 13,
13, 13, 13, 13 };
static const int8_t inv_cos_bit_row_adst_adst_8[8] = { 13, 13, 13, 13,
13, 13, 13, 13 };
static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_adst_8 = {
8, // .txfm_size
8, // .stage_num_col
8, // .stage_num_row
// 0, // .log_scale
inv_shift_adst_adst_8, // .shift
inv_stage_range_col_adst_adst_8, // .stage_range_col
inv_stage_range_row_adst_adst_8, // .stage_range_row
inv_cos_bit_col_adst_adst_8, // .cos_bit_col
inv_cos_bit_row_adst_adst_8, // .cos_bit_row
TXFM_TYPE_ADST8, // .txfm_type_col
TXFM_TYPE_ADST8
}; // .txfm_type_row
// ---------------- config inv_adst_adst_16 ----------------
static const int8_t inv_shift_adst_adst_16[2] = { -1, -5 };
static const int8_t inv_stage_range_col_adst_adst_16[10] = {
19, 19, 19, 19, 19, 19, 19, 19, 18, 18
};
static const int8_t inv_stage_range_row_adst_adst_16[10] = {
20, 20, 20, 20, 20, 20, 20, 20, 20, 20
};
static const int8_t inv_cos_bit_col_adst_adst_16[10] = { 13, 13, 13, 13, 13,
13, 13, 13, 13, 13 };
static const int8_t inv_cos_bit_row_adst_adst_16[10] = { 12, 12, 12, 12, 12,
12, 12, 12, 12, 12 };
static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_adst_16 = {
16, // .txfm_size
10, // .stage_num_col
10, // .stage_num_row
// 0, // .log_scale
inv_shift_adst_adst_16, // .shift
inv_stage_range_col_adst_adst_16, // .stage_range_col
inv_stage_range_row_adst_adst_16, // .stage_range_row
inv_cos_bit_col_adst_adst_16, // .cos_bit_col
inv_cos_bit_row_adst_adst_16, // .cos_bit_row
TXFM_TYPE_ADST16, // .txfm_type_col
TXFM_TYPE_ADST16
}; // .txfm_type_row
// ---------------- config inv_adst_adst_32 ----------------
static const int8_t inv_shift_adst_adst_32[2] = { -1, -5 };
static const int8_t inv_stage_range_col_adst_adst_32[12] = {
19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 18, 18
};
static const int8_t inv_stage_range_row_adst_adst_32[12] = {
20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20
};
static const int8_t inv_cos_bit_col_adst_adst_32[12] = {
13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13
};
static const int8_t inv_cos_bit_row_adst_adst_32[12] = {
12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12
};
static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_adst_32 = {
32, // .txfm_size
12, // .stage_num_col
12, // .stage_num_row
// 1, // .log_scale
inv_shift_adst_adst_32, // .shift
inv_stage_range_col_adst_adst_32, // .stage_range_col
inv_stage_range_row_adst_adst_32, // .stage_range_row
inv_cos_bit_col_adst_adst_32, // .cos_bit_col
inv_cos_bit_row_adst_adst_32, // .cos_bit_row
TXFM_TYPE_ADST32, // .txfm_type_col
TXFM_TYPE_ADST32
}; // .txfm_type_row
// ---------------- config inv_adst_dct_4 ----------------
static const int8_t inv_shift_adst_dct_4[2] = { 0, -4 };
static const int8_t inv_stage_range_col_adst_dct_4[6] = {
18, 18, 18, 18, 17, 17
};
static const int8_t inv_stage_range_row_adst_dct_4[4] = { 18, 18, 18, 18 };
static const int8_t inv_cos_bit_col_adst_dct_4[6] = { 13, 13, 13, 13, 13, 13 };
static const int8_t inv_cos_bit_row_adst_dct_4[4] = { 13, 13, 13, 13 };
static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_dct_4 = {
4, // .txfm_size
6, // .stage_num_col
4, // .stage_num_row
// 0, // .log_scale
inv_shift_adst_dct_4, // .shift
inv_stage_range_col_adst_dct_4, // .stage_range_col
inv_stage_range_row_adst_dct_4, // .stage_range_row
inv_cos_bit_col_adst_dct_4, // .cos_bit_col
inv_cos_bit_row_adst_dct_4, // .cos_bit_row
TXFM_TYPE_ADST4, // .txfm_type_col
TXFM_TYPE_DCT4
}; // .txfm_type_row
// ---------------- config inv_adst_dct_8 ----------------
static const int8_t inv_shift_adst_dct_8[2] = { 0, -5 };
static const int8_t inv_stage_range_col_adst_dct_8[8] = { 19, 19, 19, 19,
19, 19, 18, 18 };
static const int8_t inv_stage_range_row_adst_dct_8[6] = {
19, 19, 19, 19, 19, 19
};
static const int8_t inv_cos_bit_col_adst_dct_8[8] = { 13, 13, 13, 13,
13, 13, 13, 13 };
static const int8_t inv_cos_bit_row_adst_dct_8[6] = { 13, 13, 13, 13, 13, 13 };
static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_dct_8 = {
8, // .txfm_size
8, // .stage_num_col
6, // .stage_num_row
// 0, // .log_scale
inv_shift_adst_dct_8, // .shift
inv_stage_range_col_adst_dct_8, // .stage_range_col
inv_stage_range_row_adst_dct_8, // .stage_range_row
inv_cos_bit_col_adst_dct_8, // .cos_bit_col
inv_cos_bit_row_adst_dct_8, // .cos_bit_row
TXFM_TYPE_ADST8, // .txfm_type_col
TXFM_TYPE_DCT8
}; // .txfm_type_row
// ---------------- config inv_adst_dct_16 ----------------
static const int8_t inv_shift_adst_dct_16[2] = { -1, -5 };
static const int8_t inv_stage_range_col_adst_dct_16[10] = {
19, 19, 19, 19, 19, 19, 19, 19, 18, 18
};
static const int8_t inv_stage_range_row_adst_dct_16[8] = { 20, 20, 20, 20,
20, 20, 20, 20 };
static const int8_t inv_cos_bit_col_adst_dct_16[10] = { 13, 13, 13, 13, 13,
13, 13, 13, 13, 13 };
static const int8_t inv_cos_bit_row_adst_dct_16[8] = { 12, 12, 12, 12,
12, 12, 12, 12 };
static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_dct_16 = {
16, // .txfm_size
10, // .stage_num_col
8, // .stage_num_row
// 0, // .log_scale
inv_shift_adst_dct_16, // .shift
inv_stage_range_col_adst_dct_16, // .stage_range_col
inv_stage_range_row_adst_dct_16, // .stage_range_row
inv_cos_bit_col_adst_dct_16, // .cos_bit_col
inv_cos_bit_row_adst_dct_16, // .cos_bit_row
TXFM_TYPE_ADST16, // .txfm_type_col
TXFM_TYPE_DCT16
}; // .txfm_type_row
// ---------------- config inv_adst_dct_32 ----------------
static const int8_t inv_shift_adst_dct_32[2] = { -1, -5 };
static const int8_t inv_stage_range_col_adst_dct_32[12] = {
19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 18, 18
};
static const int8_t inv_stage_range_row_adst_dct_32[10] = {
20, 20, 20, 20, 20, 20, 20, 20, 20, 20
};
static const int8_t inv_cos_bit_col_adst_dct_32[12] = {
13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13
};
static const int8_t inv_cos_bit_row_adst_dct_32[10] = { 12, 12, 12, 12, 12,
12, 12, 12, 12, 12 };
static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_dct_32 = {
32, // .txfm_size
12, // .stage_num_col
10, // .stage_num_row
// 1, // .log_scale
inv_shift_adst_dct_32, // .shift
inv_stage_range_col_adst_dct_32, // .stage_range_col
inv_stage_range_row_adst_dct_32, // .stage_range_row
inv_cos_bit_col_adst_dct_32, // .cos_bit_col
inv_cos_bit_row_adst_dct_32, // .cos_bit_row
TXFM_TYPE_ADST32, // .txfm_type_col
TXFM_TYPE_DCT32
}; // .txfm_type_row
extern const TXFM_2D_CFG *inv_txfm_cfg_ls[TX_TYPES][TX_SIZES];
#endif // AV1_INV_TXFM2D_CFG_H_
|
