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author | Jiaxun Yang <jiaxun.yang@flygoat.com> | 2020-05-12 12:40:14 +0800 |
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committer | Moonchild <moonchild@palemoon.org> | 2020-05-20 14:03:12 +0000 |
commit | be954fca7288d4e743b279272505f63544e6ec8d (patch) | |
tree | 9933696e76af63c55130760fb7e6ffddb2193300 /js/src/jit/mips64/CodeGenerator-mips64.cpp | |
parent | f411e027165e7d95a6119d8dabbc15e4f3a206e8 (diff) | |
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Bug 1412030 - [MIPS] Emit wasm memory access information
Tag: #1542
Diffstat (limited to 'js/src/jit/mips64/CodeGenerator-mips64.cpp')
-rw-r--r-- | js/src/jit/mips64/CodeGenerator-mips64.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/js/src/jit/mips64/CodeGenerator-mips64.cpp b/js/src/jit/mips64/CodeGenerator-mips64.cpp index d1b6a7a32..862960bdf 100644 --- a/js/src/jit/mips64/CodeGenerator-mips64.cpp +++ b/js/src/jit/mips64/CodeGenerator-mips64.cpp @@ -452,7 +452,7 @@ CodeGeneratorMIPS64::emitWasmLoadI64(T* lir) if (IsUnaligned(mir->access())) { Register temp = ToRegister(lir->getTemp(1)); - masm.ma_load_unaligned(ToOutRegister64(lir).reg, BaseIndex(HeapReg, ptr, TimesOne), + masm.ma_load_unaligned(mir->access(), ToOutRegister64(lir).reg, BaseIndex(HeapReg, ptr, TimesOne), temp, static_cast<LoadStoreSize>(8 * byteSize), isSigned ? SignExtend : ZeroExtend); return; @@ -460,6 +460,7 @@ CodeGeneratorMIPS64::emitWasmLoadI64(T* lir) masm.ma_load(ToOutRegister64(lir).reg, BaseIndex(HeapReg, ptr, TimesOne), static_cast<LoadStoreSize>(8 * byteSize), isSigned ? SignExtend : ZeroExtend); + masm.append(mir->access(), masm.size() - 4, masm.framePushed()); masm.memoryBarrier(mir->access().barrierAfter()); } @@ -517,13 +518,14 @@ CodeGeneratorMIPS64::emitWasmStoreI64(T* lir) if (IsUnaligned(mir->access())) { Register temp = ToRegister(lir->getTemp(1)); - masm.ma_store_unaligned(ToRegister64(lir->value()).reg, BaseIndex(HeapReg, ptr, TimesOne), + masm.ma_store_unaligned(mir->access(), ToRegister64(lir->value()).reg, BaseIndex(HeapReg, ptr, TimesOne), temp, static_cast<LoadStoreSize>(8 * byteSize), isSigned ? SignExtend : ZeroExtend); return; } masm.ma_store(ToRegister64(lir->value()).reg, BaseIndex(HeapReg, ptr, TimesOne), static_cast<LoadStoreSize>(8 * byteSize), isSigned ? SignExtend : ZeroExtend); + masm.append(mir->access(), masm.size() - 4, masm.framePushed()); masm.memoryBarrier(mir->access().barrierAfter()); } |