summaryrefslogtreecommitdiffstats
path: root/js/src/jit/mips64/CodeGenerator-mips64.cpp
diff options
context:
space:
mode:
authorMoonchild <moonchild@palemoon.org>2020-05-19 22:14:43 +0200
committerGitHub <noreply@github.com>2020-05-19 22:14:43 +0200
commit750b4c3a11e6ed4d92598072899b02c549f17d26 (patch)
tree75e1ec3ab5ecec3a0ec29a176a3b46ef33609b76 /js/src/jit/mips64/CodeGenerator-mips64.cpp
parentffb32138cbe23dc275ec409770246739f9678cef (diff)
parent052a035958d43c3fb0a980c0c7a93ad2073afddf (diff)
downloadUXP-750b4c3a11e6ed4d92598072899b02c549f17d26.tar
UXP-750b4c3a11e6ed4d92598072899b02c549f17d26.tar.gz
UXP-750b4c3a11e6ed4d92598072899b02c549f17d26.tar.lz
UXP-750b4c3a11e6ed4d92598072899b02c549f17d26.tar.xz
UXP-750b4c3a11e6ed4d92598072899b02c549f17d26.zip
Merge pull request #1544 from FlyGoat/mips-upstream
Implements initial MIPS Support
Diffstat (limited to 'js/src/jit/mips64/CodeGenerator-mips64.cpp')
-rw-r--r--js/src/jit/mips64/CodeGenerator-mips64.cpp10
1 files changed, 6 insertions, 4 deletions
diff --git a/js/src/jit/mips64/CodeGenerator-mips64.cpp b/js/src/jit/mips64/CodeGenerator-mips64.cpp
index 45f0e69d7..862960bdf 100644
--- a/js/src/jit/mips64/CodeGenerator-mips64.cpp
+++ b/js/src/jit/mips64/CodeGenerator-mips64.cpp
@@ -449,10 +449,10 @@ CodeGeneratorMIPS64::emitWasmLoadI64(T* lir)
masm.memoryBarrier(mir->access().barrierBefore());
- if (mir->access().isUnaligned()) {
+ if (IsUnaligned(mir->access())) {
Register temp = ToRegister(lir->getTemp(1));
- masm.ma_load_unaligned(ToOutRegister64(lir).reg, BaseIndex(HeapReg, ptr, TimesOne),
+ masm.ma_load_unaligned(mir->access(), ToOutRegister64(lir).reg, BaseIndex(HeapReg, ptr, TimesOne),
temp, static_cast<LoadStoreSize>(8 * byteSize),
isSigned ? SignExtend : ZeroExtend);
return;
@@ -460,6 +460,7 @@ CodeGeneratorMIPS64::emitWasmLoadI64(T* lir)
masm.ma_load(ToOutRegister64(lir).reg, BaseIndex(HeapReg, ptr, TimesOne),
static_cast<LoadStoreSize>(8 * byteSize), isSigned ? SignExtend : ZeroExtend);
+ masm.append(mir->access(), masm.size() - 4, masm.framePushed());
masm.memoryBarrier(mir->access().barrierAfter());
}
@@ -514,16 +515,17 @@ CodeGeneratorMIPS64::emitWasmStoreI64(T* lir)
masm.memoryBarrier(mir->access().barrierBefore());
- if (mir->access().isUnaligned()) {
+ if (IsUnaligned(mir->access())) {
Register temp = ToRegister(lir->getTemp(1));
- masm.ma_store_unaligned(ToRegister64(lir->value()).reg, BaseIndex(HeapReg, ptr, TimesOne),
+ masm.ma_store_unaligned(mir->access(), ToRegister64(lir->value()).reg, BaseIndex(HeapReg, ptr, TimesOne),
temp, static_cast<LoadStoreSize>(8 * byteSize),
isSigned ? SignExtend : ZeroExtend);
return;
}
masm.ma_store(ToRegister64(lir->value()).reg, BaseIndex(HeapReg, ptr, TimesOne),
static_cast<LoadStoreSize>(8 * byteSize), isSigned ? SignExtend : ZeroExtend);
+ masm.append(mir->access(), masm.size() - 4, masm.framePushed());
masm.memoryBarrier(mir->access().barrierAfter());
}