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authorMoonchild <moonchild@palemoon.org>2020-06-01 21:58:35 +0000
committerMoonchild <moonchild@palemoon.org>2020-06-01 21:58:35 +0000
commitc6ca4380e9e5e95df9de02daf8bfb9a6ebc22810 (patch)
treec7672903a2030d37f861b12900165a015f49d10a /js/src/jit/mips64/CodeGenerator-mips64.cpp
parent451509e2c0188a4164d4b3d1d9f5839ed1e95246 (diff)
parent744b044935f7d1d67fbe0df42d898efcbdd00536 (diff)
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Merge remote-tracking branch 'origin/redwood' into release
Diffstat (limited to 'js/src/jit/mips64/CodeGenerator-mips64.cpp')
-rw-r--r--js/src/jit/mips64/CodeGenerator-mips64.cpp10
1 files changed, 6 insertions, 4 deletions
diff --git a/js/src/jit/mips64/CodeGenerator-mips64.cpp b/js/src/jit/mips64/CodeGenerator-mips64.cpp
index 45f0e69d7..862960bdf 100644
--- a/js/src/jit/mips64/CodeGenerator-mips64.cpp
+++ b/js/src/jit/mips64/CodeGenerator-mips64.cpp
@@ -449,10 +449,10 @@ CodeGeneratorMIPS64::emitWasmLoadI64(T* lir)
masm.memoryBarrier(mir->access().barrierBefore());
- if (mir->access().isUnaligned()) {
+ if (IsUnaligned(mir->access())) {
Register temp = ToRegister(lir->getTemp(1));
- masm.ma_load_unaligned(ToOutRegister64(lir).reg, BaseIndex(HeapReg, ptr, TimesOne),
+ masm.ma_load_unaligned(mir->access(), ToOutRegister64(lir).reg, BaseIndex(HeapReg, ptr, TimesOne),
temp, static_cast<LoadStoreSize>(8 * byteSize),
isSigned ? SignExtend : ZeroExtend);
return;
@@ -460,6 +460,7 @@ CodeGeneratorMIPS64::emitWasmLoadI64(T* lir)
masm.ma_load(ToOutRegister64(lir).reg, BaseIndex(HeapReg, ptr, TimesOne),
static_cast<LoadStoreSize>(8 * byteSize), isSigned ? SignExtend : ZeroExtend);
+ masm.append(mir->access(), masm.size() - 4, masm.framePushed());
masm.memoryBarrier(mir->access().barrierAfter());
}
@@ -514,16 +515,17 @@ CodeGeneratorMIPS64::emitWasmStoreI64(T* lir)
masm.memoryBarrier(mir->access().barrierBefore());
- if (mir->access().isUnaligned()) {
+ if (IsUnaligned(mir->access())) {
Register temp = ToRegister(lir->getTemp(1));
- masm.ma_store_unaligned(ToRegister64(lir->value()).reg, BaseIndex(HeapReg, ptr, TimesOne),
+ masm.ma_store_unaligned(mir->access(), ToRegister64(lir->value()).reg, BaseIndex(HeapReg, ptr, TimesOne),
temp, static_cast<LoadStoreSize>(8 * byteSize),
isSigned ? SignExtend : ZeroExtend);
return;
}
masm.ma_store(ToRegister64(lir->value()).reg, BaseIndex(HeapReg, ptr, TimesOne),
static_cast<LoadStoreSize>(8 * byteSize), isSigned ? SignExtend : ZeroExtend);
+ masm.append(mir->access(), masm.size() - 4, masm.framePushed());
masm.memoryBarrier(mir->access().barrierAfter());
}