Bug 1412030 - [MIPS] Emit wasm memory access information

Tag: #1542

3 files changed, 64 insertions, 49 deletions

diff --git a/js/src/jit/mips32/CodeGenerator-mips32.cpp b/js/src/jit/mips32/CodeGenerator-mips32.cpp
index 33fea01ae..f41c72f5b 100644
--- a/js/src/jit/mips32/CodeGenerator-mips32.cpp
+++ b/js/src/jit/mips32/CodeGenerator-mips32.cpp
@@ -494,7 +494,7 @@ CodeGeneratorMIPS::emitWasmLoadI64(T* lir)
         Register temp = ToRegister(lir->getTemp(1));
 
         if (byteSize <= 4) {
-            masm.ma_load_unaligned(output.low, BaseIndex(HeapReg, ptr, TimesOne),
+            masm.ma_load_unaligned(mir->access(), output.low, BaseIndex(HeapReg, ptr, TimesOne),
                                    temp, static_cast<LoadStoreSize>(8 * byteSize),
                                    isSigned ? SignExtend : ZeroExtend);
             if (!isSigned)
@@ -502,12 +502,11 @@ CodeGeneratorMIPS::emitWasmLoadI64(T* lir)
             else
                 masm.ma_sra(output.high, output.low, Imm32(31));
         } else {
-            ScratchRegisterScope scratch(masm);
-            masm.ma_load_unaligned(output.low, BaseIndex(HeapReg, ptr, TimesOne),
-                                   temp, SizeWord, isSigned ? SignExtend : ZeroExtend);
-            masm.ma_addu(scratch, ptr, Imm32(INT64HIGH_OFFSET));
-            masm.ma_load_unaligned(output.high, BaseIndex(HeapReg, scratch, TimesOne),
-                                   temp, SizeWord, isSigned ? SignExtend : ZeroExtend);
+            masm.ma_load_unaligned(mir->access(), output.low,
+                                   BaseIndex(HeapReg, ptr, TimesOne), temp, SizeWord, ZeroExtend);
+            masm.ma_load_unaligned(mir->access(), output.high,
+                                   BaseIndex(HeapReg, ptr, TimesOne, INT64HIGH_OFFSET), temp,
+                                   SizeWord, SignExtend);
         }
         return;
     }
@@ -515,15 +514,15 @@ CodeGeneratorMIPS::emitWasmLoadI64(T* lir)
     if (byteSize <= 4) {
         masm.ma_load(output.low, BaseIndex(HeapReg, ptr, TimesOne),
                      static_cast<LoadStoreSize>(8 * byteSize), isSigned ? SignExtend : ZeroExtend);
+        masm.append(mir->access(), masm.size() - 4 , masm.framePushed());
         if (!isSigned)
             masm.move32(Imm32(0), output.high);
         else
             masm.ma_sra(output.high, output.low, Imm32(31));
     } else {
-        ScratchRegisterScope scratch(masm);
-        masm.ma_load(output.low, BaseIndex(HeapReg, ptr, TimesOne), SizeWord);
-        masm.ma_addu(scratch, ptr, Imm32(INT64HIGH_OFFSET));
-        masm.ma_load(output.high, BaseIndex(HeapReg, scratch, TimesOne), SizeWord);
+        masm.append(mir->access(), masm.size() - 4 , masm.framePushed());
+        masm.ma_load(output.high, BaseIndex(HeapReg, ptr, TimesOne, INT64HIGH_OFFSET), SizeWord);
+        masm.append(mir->access(), masm.size() - 4 , masm.framePushed());
     }
 
     masm.memoryBarrier(mir->access().barrierAfter());
@@ -581,16 +580,15 @@ CodeGeneratorMIPS::emitWasmStoreI64(T* lir)
         Register temp = ToRegister(lir->getTemp(1));
 
         if (byteSize <= 4) {
-            masm.ma_store_unaligned(value.low, BaseIndex(HeapReg, ptr, TimesOne),
+            masm.ma_store_unaligned(mir->access(), value.low, BaseIndex(HeapReg, ptr, TimesOne),
                                     temp, static_cast<LoadStoreSize>(8 * byteSize),
                                     isSigned ? SignExtend : ZeroExtend);
         } else {
-            ScratchRegisterScope scratch(masm);
-            masm.ma_store_unaligned(value.low, BaseIndex(HeapReg, ptr, TimesOne),
-                                    temp, SizeWord, isSigned ? SignExtend : ZeroExtend);
-            masm.ma_addu(scratch, ptr, Imm32(INT64HIGH_OFFSET));
-            masm.ma_store_unaligned(value.high, BaseIndex(HeapReg, scratch, TimesOne),
-                                    temp, SizeWord, isSigned ? SignExtend : ZeroExtend);
+            masm.ma_store_unaligned(mir->access(), value.high,
+                                    BaseIndex(HeapReg, ptr, TimesOne, INT64HIGH_OFFSET), temp,
+                                    SizeWord, SignExtend);
+            masm.ma_store_unaligned(mir->access(), value.low, BaseIndex(HeapReg, ptr, TimesOne),
+                                    temp, SizeWord, ZeroExtend);
         }
         return;
     }
@@ -598,11 +596,12 @@ CodeGeneratorMIPS::emitWasmStoreI64(T* lir)
     if (byteSize <= 4) {
         masm.ma_store(value.low, BaseIndex(HeapReg, ptr, TimesOne),
                       static_cast<LoadStoreSize>(8 * byteSize));
+        masm.append(mir->access(), masm.size() - 4, masm.framePushed());
+
     } else {
-        ScratchRegisterScope scratch(masm);
+        masm.ma_store(value.high, BaseIndex(HeapReg, ptr, TimesOne, INT64HIGH_OFFSET), SizeWord);
+        masm.append(mir->access(), masm.size() - 4, masm.framePushed());
         masm.ma_store(value.low, BaseIndex(HeapReg, ptr, TimesOne), SizeWord);
-        masm.ma_addu(scratch, ptr, Imm32(INT64HIGH_OFFSET));
-        masm.ma_store(value.high, BaseIndex(HeapReg, scratch, TimesOne), SizeWord);
     }
 
     masm.memoryBarrier(mir->access().barrierAfter());
diff --git a/js/src/jit/mips32/MacroAssembler-mips32.cpp b/js/src/jit/mips32/MacroAssembler-mips32.cpp
index 7472ed78b..94aef3f4d 100644
--- a/js/src/jit/mips32/MacroAssembler-mips32.cpp
+++ b/js/src/jit/mips32/MacroAssembler-mips32.cpp
@@ -801,26 +801,32 @@ MacroAssemblerMIPSCompat::loadDouble(const BaseIndex& src, FloatRegister dest)
 }
 
 void
-MacroAssemblerMIPSCompat::loadUnalignedDouble(const BaseIndex& src, Register temp,
-                                              FloatRegister dest)
+MacroAssemblerMIPSCompat::loadUnalignedDouble(const wasm::MemoryAccessDesc& access,
+                                              const BaseIndex& src, Register temp, FloatRegister dest)
 {
     computeScaledAddress(src, SecondScratchReg);
 
+    uint32_t framePushed = asMasm().framePushed();
+    BufferOffset load;
     if (Imm16::IsInSignedRange(src.offset) && Imm16::IsInSignedRange(src.offset + 7)) {
-        as_lwl(temp, SecondScratchReg, src.offset + INT64LOW_OFFSET + 3);
+        load = as_lwl(temp, SecondScratchReg, src.offset + INT64LOW_OFFSET + 3);
         as_lwr(temp, SecondScratchReg, src.offset + INT64LOW_OFFSET);
+        append(access, load.getOffset(), framePushed);
         moveToDoubleLo(temp, dest);
-        as_lwl(temp, SecondScratchReg, src.offset + INT64HIGH_OFFSET + 3);
+        load = as_lwl(temp, SecondScratchReg, src.offset + INT64HIGH_OFFSET + 3);
         as_lwr(temp, SecondScratchReg, src.offset + INT64HIGH_OFFSET);
+        append(access, load.getOffset(), framePushed);
         moveToDoubleHi(temp, dest);
     } else {
         ma_li(ScratchRegister, Imm32(src.offset));
         as_daddu(ScratchRegister, SecondScratchReg, ScratchRegister);
-        as_lwl(temp, ScratchRegister, INT64LOW_OFFSET + 3);
+        load = as_lwl(temp, ScratchRegister, INT64LOW_OFFSET + 3);
         as_lwr(temp, ScratchRegister, INT64LOW_OFFSET);
+        append(access, load.getOffset(), framePushed);
         moveToDoubleLo(temp, dest);
-        as_lwl(temp, ScratchRegister, INT64HIGH_OFFSET + 3);
+        load = as_lwl(temp, ScratchRegister, INT64HIGH_OFFSET + 3);
         as_lwr(temp, ScratchRegister, INT64HIGH_OFFSET);
+        append(access, load.getOffset(), framePushed);
         moveToDoubleHi(temp, dest);
     }
 }
@@ -853,21 +859,21 @@ MacroAssemblerMIPSCompat::loadFloat32(const BaseIndex& src, FloatRegister dest)
 }
 
 void
-MacroAssemblerMIPSCompat::loadUnalignedFloat32(const BaseIndex& src, Register temp,
-                                               FloatRegister dest)
+MacroAssemblerMIPSCompat::loadUnalignedFloat32(const wasm::MemoryAccessDesc& access,
+                                               const BaseIndex& src, Register temp, FloatRegister dest)
 {
     computeScaledAddress(src, SecondScratchReg);
-
+    BufferOffset load;
     if (Imm16::IsInSignedRange(src.offset) && Imm16::IsInSignedRange(src.offset + 3)) {
-        as_lwl(temp, SecondScratchReg, src.offset + 3);
+        load = as_lwl(temp, SecondScratchReg, src.offset + 3);
         as_lwr(temp, SecondScratchReg, src.offset);
     } else {
         ma_li(ScratchRegister, Imm32(src.offset));
         as_daddu(ScratchRegister, SecondScratchReg, ScratchRegister);
-        as_lwl(temp, ScratchRegister, 3);
+        load = as_lwl(temp, ScratchRegister, 3);
         as_lwr(temp, ScratchRegister, 0);
     }
-
+    append(access, load.getOffset(), asMasm().framePushed());
     moveToFloat32(temp, dest);
 }
 
@@ -1005,46 +1011,52 @@ MacroAssemblerMIPSCompat::storePtr(Register src, AbsoluteAddress dest)
 }
 
 void
-MacroAssemblerMIPSCompat::storeUnalignedFloat32(FloatRegister src, Register temp,
-                                                const BaseIndex& dest)
+MacroAssemblerMIPSCompat::storeUnalignedFloat32(const wasm::MemoryAccessDesc& access,
+                                                FloatRegister src, Register temp, const BaseIndex& dest)
 {
     computeScaledAddress(dest, SecondScratchReg);
     moveFromFloat32(src, temp);
 
+    BufferOffset store;
     if (Imm16::IsInSignedRange(dest.offset) && Imm16::IsInSignedRange(dest.offset + 3)) {
-        as_swl(temp, SecondScratchReg, dest.offset + 3);
+        store = as_swl(temp, SecondScratchReg, dest.offset + 3);
         as_swr(temp, SecondScratchReg, dest.offset);
     } else {
         ma_li(ScratchRegister, Imm32(dest.offset));
         as_daddu(ScratchRegister, SecondScratchReg, ScratchRegister);
-        as_swl(temp, ScratchRegister, 3);
+        store = as_swl(temp, ScratchRegister, 3);
         as_swr(temp, ScratchRegister, 0);
     }
+    append(access, store.getOffset(), asMasm().framePushed());
 }
 
 void
-MacroAssemblerMIPSCompat::storeUnalignedDouble(FloatRegister src, Register temp,
-                                               const BaseIndex& dest)
+MacroAssemblerMIPSCompat::storeUnalignedDouble(const wasm::MemoryAccessDesc& access,
+                                               FloatRegister src, Register temp, const BaseIndex& dest)
 {
     computeScaledAddress(dest, SecondScratchReg);
 
+    uint32_t framePushed = asMasm().framePushed();
+    BufferOffset store;
     if (Imm16::IsInSignedRange(dest.offset) && Imm16::IsInSignedRange(dest.offset + 7)) {
+        moveFromDoubleHi(src, temp);
+        store = as_swl(temp, SecondScratchReg, dest.offset + INT64HIGH_OFFSET + 3);
+        as_swr(temp, SecondScratchReg, dest.offset + INT64HIGH_OFFSET);
         moveFromDoubleLo(src, temp);
         as_swl(temp, SecondScratchReg, dest.offset + INT64LOW_OFFSET + 3);
         as_swr(temp, SecondScratchReg, dest.offset + INT64LOW_OFFSET);
-        moveFromDoubleHi(src, temp);
-        as_swl(temp, SecondScratchReg, dest.offset + INT64HIGH_OFFSET + 3);
-        as_swr(temp, SecondScratchReg, dest.offset + INT64HIGH_OFFSET);
+
     } else {
         ma_li(ScratchRegister, Imm32(dest.offset));
         as_daddu(ScratchRegister, SecondScratchReg, ScratchRegister);
+        moveFromDoubleHi(src, temp);
+        store = as_swl(temp, ScratchRegister, INT64HIGH_OFFSET + 3);
+        as_swr(temp, ScratchRegister, INT64HIGH_OFFSET);
         moveFromDoubleLo(src, temp);
         as_swl(temp, ScratchRegister, INT64LOW_OFFSET + 3);
         as_swr(temp, ScratchRegister, INT64LOW_OFFSET);
-        moveFromDoubleHi(src, temp);
-        as_swl(temp, ScratchRegister, INT64HIGH_OFFSET + 3);
-        as_swr(temp, ScratchRegister, INT64HIGH_OFFSET);
     }
+    append(access, store.getOffset(), framePushed);
 }
 
 // Note: this function clobbers the input register.
diff --git a/js/src/jit/mips32/MacroAssembler-mips32.h b/js/src/jit/mips32/MacroAssembler-mips32.h
index 37d279b09..5cec70430 100644
--- a/js/src/jit/mips32/MacroAssembler-mips32.h
+++ b/js/src/jit/mips32/MacroAssembler-mips32.h
@@ -897,7 +897,8 @@ class MacroAssemblerMIPSCompat : public MacroAssemblerMIPS
 
     void loadDouble(const Address& addr, FloatRegister dest);
     void loadDouble(const BaseIndex& src, FloatRegister dest);
-    void loadUnalignedDouble(const BaseIndex& src, Register temp, FloatRegister dest);
+    void loadUnalignedDouble(const wasm::MemoryAccessDesc& access, const BaseIndex& src,
+                             Register temp, FloatRegister dest);
 
     // Load a float value into a register, then expand it to a double.
     void loadFloatAsDouble(const Address& addr, FloatRegister dest);
@@ -905,7 +906,8 @@ class MacroAssemblerMIPSCompat : public MacroAssemblerMIPS
 
     void loadFloat32(const Address& addr, FloatRegister dest);
     void loadFloat32(const BaseIndex& src, FloatRegister dest);
-    void loadUnalignedFloat32(const BaseIndex& src, Register temp, FloatRegister dest);
+    void loadUnalignedFloat32(const wasm::MemoryAccessDesc& access, const BaseIndex& src,
+                              Register temp, FloatRegister dest);
 
     void store8(Register src, const Address& address);
     void store8(Imm32 imm, const Address& address);
@@ -946,8 +948,10 @@ class MacroAssemblerMIPSCompat : public MacroAssemblerMIPS
     void storePtr(Register src, const BaseIndex& address);
     void storePtr(Register src, AbsoluteAddress dest);
 
-    void storeUnalignedFloat32(FloatRegister src, Register temp, const BaseIndex& dest);
-    void storeUnalignedDouble(FloatRegister src, Register temp, const BaseIndex& dest);
+    void storeUnalignedFloat32(const wasm::MemoryAccessDesc& access, FloatRegister src,
+                               Register temp, const BaseIndex& dest);
+    void storeUnalignedDouble(const wasm::MemoryAccessDesc& access, FloatRegister src,
+                              Register temp, const BaseIndex& dest);
 
     void moveDouble(FloatRegister src, FloatRegister dest) {
         as_movd(dest, src);