From fee5da8d111a8d27f8c48d7ee66856716b1266fc Mon Sep 17 00:00:00 2001 From: Jiaxun Yang Date: Tue, 12 May 2020 12:40:14 +0800 Subject: Bug 1384826 - Media: WebRTC: Fix build config for MIPS Tag: #1542 --- media/webrtc/trunk/build/build_config.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'media/webrtc') diff --git a/media/webrtc/trunk/build/build_config.h b/media/webrtc/trunk/build/build_config.h index 8966586a7..1fb3e86d0 100644 --- a/media/webrtc/trunk/build/build_config.h +++ b/media/webrtc/trunk/build/build_config.h @@ -114,11 +114,6 @@ #define ARCH_CPU_LITTLE_ENDIAN 1 #elif defined(__pnacl__) #define ARCH_CPU_32_BITS 1 -#elif defined(__MIPSEL__) -#define ARCH_CPU_MIPS_FAMILY 1 -#define ARCH_CPU_MIPSEL 1 -#define ARCH_CPU_32_BITS 1 -#define ARCH_CPU_LITTLE_ENDIAN 1 #elif defined(__powerpc64__) #define ARCH_CPU_PPC_FAMILY 1 #define ARCH_CPU_PPC64 1 @@ -141,6 +136,11 @@ #define ARCH_CPU_MIPS_FAMILY 1 #define ARCH_CPU_MIPS 1 #define ARCH_CPU_32_BITS 1 +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ +#define ARCH_CPU_LITTLE_ENDIAN 1 +#else +#define ARCH_CPU_BIG_ENDIAN 1 +#endif #elif defined(__hppa__) #define ARCH_CPU_HPPA 1 #define ARCH_CPU_32_BITS 1 -- cgit v1.2.3 From 3b1aec2e6120c020f00612816e0a696ccf8936f6 Mon Sep 17 00:00:00 2001 From: Jiaxun Yang Date: Tue, 12 May 2020 12:40:15 +0800 Subject: Issue #1542 - [WebRTC] Don't use post proc on MIPS --- media/webrtc/trunk/webrtc/modules/video_coding/codecs/vp8/vp8_impl.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'media/webrtc') diff --git a/media/webrtc/trunk/webrtc/modules/video_coding/codecs/vp8/vp8_impl.cc b/media/webrtc/trunk/webrtc/modules/video_coding/codecs/vp8/vp8_impl.cc index c48f96db3..5eb0fd279 100644 --- a/media/webrtc/trunk/webrtc/modules/video_coding/codecs/vp8/vp8_impl.cc +++ b/media/webrtc/trunk/webrtc/modules/video_coding/codecs/vp8/vp8_impl.cc @@ -1103,7 +1103,7 @@ int VP8DecoderImpl::InitDecode(const VideoCodec* inst, cfg.h = cfg.w = 0; // set after decode vpx_codec_flags_t flags = 0; -#ifndef WEBRTC_ARCH_ARM +#if !defined(WEBRTC_ARCH_ARM) && !defined(WEBRTC_ARCH_MIPS) flags = VPX_CODEC_USE_POSTPROC; #ifdef INDEPENDENT_PARTITIONS flags |= VPX_CODEC_USE_INPUT_PARTITION; -- cgit v1.2.3 From 7ce1ea0a41c20e168922f8e9c25f220e19887c10 Mon Sep 17 00:00:00 2001 From: Jiaxun Yang Date: Tue, 12 May 2020 12:40:15 +0800 Subject: Issue #1542 - [WebRTC] Set CPU speed to -1 on MIPS CPU is pretty slow due to lack of SIMD optmization. --- .../webrtc/trunk/webrtc/modules/video_coding/codecs/vp8/vp8_impl.cc | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'media/webrtc') diff --git a/media/webrtc/trunk/webrtc/modules/video_coding/codecs/vp8/vp8_impl.cc b/media/webrtc/trunk/webrtc/modules/video_coding/codecs/vp8/vp8_impl.cc index 5eb0fd279..b6a9fc596 100644 --- a/media/webrtc/trunk/webrtc/modules/video_coding/codecs/vp8/vp8_impl.cc +++ b/media/webrtc/trunk/webrtc/modules/video_coding/codecs/vp8/vp8_impl.cc @@ -615,6 +615,11 @@ int VP8EncoderImpl::SetCpuSpeed(int width, int height) { // On mobile platform, always set to -12 to leverage between cpu usage // and video quality. return -12; +#elif defined(WEBRTC_ARCH_MIPS) + // On mips platform, temporarily set to -12 to leverage between cpu usage + // and video quality. + // TODO: Once improved the coding performance,recover the complexity setting. + return -12; #else // For non-ARM, increase encoding complexity (i.e., use lower speed setting) // if resolution is below CIF. Otherwise, keep the default/user setting -- cgit v1.2.3 From 088685a828f7e6477e88c412a56508b474ebe8b4 Mon Sep 17 00:00:00 2001 From: Jiaxun Yang Date: Tue, 12 May 2020 12:40:15 +0800 Subject: Bug 1426323 - Media: WebRTC: Fix build config for MIPS64 Tag: #1542 --- media/webrtc/trunk/build/build_config.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'media/webrtc') diff --git a/media/webrtc/trunk/build/build_config.h b/media/webrtc/trunk/build/build_config.h index 1fb3e86d0..93a28855b 100644 --- a/media/webrtc/trunk/build/build_config.h +++ b/media/webrtc/trunk/build/build_config.h @@ -135,7 +135,11 @@ #elif defined(__mips__) #define ARCH_CPU_MIPS_FAMILY 1 #define ARCH_CPU_MIPS 1 +#if defined(__LP64__) +#define ARCH_CPU_64_BITS 1 +#else #define ARCH_CPU_32_BITS 1 +#endif #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ #define ARCH_CPU_LITTLE_ENDIAN 1 #else -- cgit v1.2.3