From 4fc1cd5563bf3b7312ccd8317f296a8142ba2ff5 Mon Sep 17 00:00:00 2001
From: Jiaxun Yang <jiaxun.yang@flygoat.com>
Date: Tue, 12 May 2020 12:40:05 +0800
Subject: Bug 1323136 - wasm: MIPS: Do bounds check in 32-bit
Tag: #1542
---
js/src/jit/mips32/MacroAssembler-mips32.cpp | 11 -----------
1 file changed, 11 deletions(-)
(limited to 'js/src/jit/mips32/MacroAssembler-mips32.cpp')
diff --git a/js/src/jit/mips32/MacroAssembler-mips32.cpp b/js/src/jit/mips32/MacroAssembler-mips32.cpp
index 2b2fab92d..d3d3a75d1 100644
--- a/js/src/jit/mips32/MacroAssembler-mips32.cpp
+++ b/js/src/jit/mips32/MacroAssembler-mips32.cpp
@@ -202,17 +202,6 @@ MacroAssemblerMIPS::ma_li(Register dest, ImmWord imm)
ma_li(dest, Imm32(uint32_t(imm.value)));
}
-// This method generates lui and ori instruction pair that can be modified by
-// UpdateLuiOriValue, either during compilation (eg. Assembler::bind), or
-// during execution (eg. jit::PatchJump).
-void
-MacroAssemblerMIPS::ma_liPatchable(Register dest, Imm32 imm)
-{
- m_buffer.ensureSpace(2 * sizeof(uint32_t));
- as_lui(dest, Imm16::Upper(imm).encode());
- as_ori(dest, dest, Imm16::Lower(imm).encode());
-}
-
void
MacroAssemblerMIPS::ma_liPatchable(Register dest, ImmPtr imm)
{
--
cgit v1.2.3
From a141af108f5adaa443ca2144513c2e051be7b844 Mon Sep 17 00:00:00 2001
From: Jiaxun Yang <jiaxun.yang@flygoat.com>
Date: Tue, 12 May 2020 12:40:07 +0800
Subject: Bug 1271968 - IonMonkey: MIPS: Replace long jumps by mixed jumps.
Tag: #1542
---
js/src/jit/mips32/MacroAssembler-mips32.cpp | 68 ++++++++++-------------------
1 file changed, 23 insertions(+), 45 deletions(-)
(limited to 'js/src/jit/mips32/MacroAssembler-mips32.cpp')
diff --git a/js/src/jit/mips32/MacroAssembler-mips32.cpp b/js/src/jit/mips32/MacroAssembler-mips32.cpp
index d3d3a75d1..53d1a7925 100644
--- a/js/src/jit/mips32/MacroAssembler-mips32.cpp
+++ b/js/src/jit/mips32/MacroAssembler-mips32.cpp
@@ -504,16 +504,13 @@ MacroAssemblerMIPS::ma_b(Address addr, ImmGCPtr imm, Label* label, Condition c,
}
void
-MacroAssemblerMIPS::ma_bal(Label* label, DelaySlotFill delaySlotFill)
+MacroAssemblerMIPS::ma_jal(Label* label)
{
if (label->bound()) {
- // Generate the long jump for calls because return address has to be
- // the address after the reserved block.
- addLongJump(nextOffset());
- ma_liPatchable(ScratchRegister, Imm32(label->offset()));
- as_jalr(ScratchRegister);
- if (delaySlotFill == FillDelaySlot)
- as_nop();
+ // Generate the mixed jump.
+ addMixedJump(nextOffset(), ImmPtr((void*)label->offset()));
+ as_jal(JOffImm26(0));
+ as_nop();
return;
}
@@ -521,16 +518,12 @@ MacroAssemblerMIPS::ma_bal(Label* label, DelaySlotFill delaySlotFill)
uint32_t nextInChain = label->used() ? label->offset() : LabelBase::INVALID_OFFSET;
// Make the whole branch continous in the buffer.
- m_buffer.ensureSpace(4 * sizeof(uint32_t));
+ m_buffer.ensureSpace(2 * sizeof(uint32_t));
- BufferOffset bo = writeInst(getBranchCode(BranchIsCall).encode());
+ BufferOffset bo = as_jal(JOffImm26(0));
writeInst(nextInChain);
if (!oom())
label->use(bo.getOffset());
- // Leave space for long jump.
- as_nop();
- if (delaySlotFill == FillDelaySlot)
- as_nop();
}
void
@@ -554,20 +547,18 @@ MacroAssemblerMIPS::branchWithCode(InstImm code, Label* label, JumpKind jumpKind
}
if (code.encode() == inst_beq.encode()) {
- // Handle long jump
- addLongJump(nextOffset());
- ma_liPatchable(ScratchRegister, Imm32(label->offset()));
- as_jr(ScratchRegister);
+ // Handle mixed jump
+ addMixedJump(nextOffset(), ImmPtr((void*)label->offset()));
+ as_j(JOffImm26(0));
as_nop();
return;
}
// Handle long conditional branch
- writeInst(invertBranch(code, BOffImm16(5 * sizeof(uint32_t))).encode());
- // No need for a "nop" here because we can clobber scratch.
- addLongJump(nextOffset());
- ma_liPatchable(ScratchRegister, Imm32(label->offset()));
- as_jr(ScratchRegister);
+ writeInst(invertBranch(code, BOffImm16(4 * sizeof(uint32_t))).encode());
+ as_nop();
+ addMixedJump(nextOffset(), ImmPtr((void*)label->offset()));
+ as_j(JOffImm26(0));
as_nop();
return;
}
@@ -577,33 +568,21 @@ MacroAssemblerMIPS::branchWithCode(InstImm code, Label* label, JumpKind jumpKind
// Second word holds a pointer to the next branch in label's chain.
uint32_t nextInChain = label->used() ? label->offset() : LabelBase::INVALID_OFFSET;
- if (jumpKind == ShortJump) {
- // Make the whole branch continous in the buffer.
- m_buffer.ensureSpace(2 * sizeof(uint32_t));
+ // Make the whole branch continous in the buffer.
+ m_buffer.ensureSpace(4 * sizeof(uint32_t));
+ if (jumpKind == ShortJump) {
// Indicate that this is short jump with offset 4.
code.setBOffImm16(BOffImm16(4));
- BufferOffset bo = writeInst(code.encode());
- writeInst(nextInChain);
- if (!oom())
- label->use(bo.getOffset());
- return;
}
-
- bool conditional = code.encode() != inst_beq.encode();
-
- // Make the whole branch continous in the buffer.
- m_buffer.ensureSpace((conditional ? 5 : 4) * sizeof(uint32_t));
-
BufferOffset bo = writeInst(code.encode());
writeInst(nextInChain);
if (!oom())
label->use(bo.getOffset());
- // Leave space for potential long jump.
- as_nop();
- as_nop();
- if (conditional)
+ if (jumpKind != ShortJump && code.encode() != inst_beq.encode()) {
as_nop();
+ as_nop();
+ }
}
void
@@ -1597,13 +1576,12 @@ MacroAssemblerMIPSCompat::jumpWithPatch(RepatchLabel* label, Label* documentatio
{
// Only one branch per label.
MOZ_ASSERT(!label->used());
- uint32_t dest = label->bound() ? label->offset() : LabelBase::INVALID_OFFSET;
BufferOffset bo = nextOffset();
label->use(bo.getOffset());
- addLongJump(bo);
- ma_liPatchable(ScratchRegister, Imm32(dest));
- as_jr(ScratchRegister);
+ if (label->bound())
+ addMixedJump(bo, ImmPtr((void*)label->offset()), MixedJumpPatch::PATCHABLE);
+ as_j(JOffImm26(0));
as_nop();
return CodeOffsetJump(bo.getOffset());
}
--
cgit v1.2.3
From 6b56185c0b77cb4b3756fdd4b517b74c77c90afc Mon Sep 17 00:00:00 2001
From: Jiaxun Yang <jiaxun.yang@flygoat.com>
Date: Tue, 12 May 2020 12:40:08 +0800
Subject: Bug 1271968 - IonMonkey: MIPS: Merge MacroAssembler::ma_jal.
Tag: #1542
---
js/src/jit/mips32/MacroAssembler-mips32.cpp | 23 -----------------------
1 file changed, 23 deletions(-)
(limited to 'js/src/jit/mips32/MacroAssembler-mips32.cpp')
diff --git a/js/src/jit/mips32/MacroAssembler-mips32.cpp b/js/src/jit/mips32/MacroAssembler-mips32.cpp
index 53d1a7925..5b9b835ce 100644
--- a/js/src/jit/mips32/MacroAssembler-mips32.cpp
+++ b/js/src/jit/mips32/MacroAssembler-mips32.cpp
@@ -503,29 +503,6 @@ MacroAssemblerMIPS::ma_b(Address addr, ImmGCPtr imm, Label* label, Condition c,
ma_b(SecondScratchReg, imm, label, c, jumpKind);
}
-void
-MacroAssemblerMIPS::ma_jal(Label* label)
-{
- if (label->bound()) {
- // Generate the mixed jump.
- addMixedJump(nextOffset(), ImmPtr((void*)label->offset()));
- as_jal(JOffImm26(0));
- as_nop();
- return;
- }
-
- // Second word holds a pointer to the next branch in label's chain.
- uint32_t nextInChain = label->used() ? label->offset() : LabelBase::INVALID_OFFSET;
-
- // Make the whole branch continous in the buffer.
- m_buffer.ensureSpace(2 * sizeof(uint32_t));
-
- BufferOffset bo = as_jal(JOffImm26(0));
- writeInst(nextInChain);
- if (!oom())
- label->use(bo.getOffset());
-}
-
void
MacroAssemblerMIPS::branchWithCode(InstImm code, Label* label, JumpKind jumpKind)
{
--
cgit v1.2.3
From 98620e3c1e67d60b4a338ba7fe2fa1fd885357b6 Mon Sep 17 00:00:00 2001
From: Jiaxun Yang <jiaxun.yang@flygoat.com>
Date: Tue, 12 May 2020 12:40:08 +0800
Subject: Bug 1271968 - IonMonkey: MIPS: Merge MacroAssembler::branchWithCode.
Tag: #1542
---
js/src/jit/mips32/MacroAssembler-mips32.cpp | 59 -----------------------------
1 file changed, 59 deletions(-)
(limited to 'js/src/jit/mips32/MacroAssembler-mips32.cpp')
diff --git a/js/src/jit/mips32/MacroAssembler-mips32.cpp b/js/src/jit/mips32/MacroAssembler-mips32.cpp
index 5b9b835ce..46e52f132 100644
--- a/js/src/jit/mips32/MacroAssembler-mips32.cpp
+++ b/js/src/jit/mips32/MacroAssembler-mips32.cpp
@@ -503,65 +503,6 @@ MacroAssemblerMIPS::ma_b(Address addr, ImmGCPtr imm, Label* label, Condition c,
ma_b(SecondScratchReg, imm, label, c, jumpKind);
}
-void
-MacroAssemblerMIPS::branchWithCode(InstImm code, Label* label, JumpKind jumpKind)
-{
- MOZ_ASSERT(code.encode() != InstImm(op_regimm, zero, rt_bgezal, BOffImm16(0)).encode());
- InstImm inst_beq = InstImm(op_beq, zero, zero, BOffImm16(0));
-
- if (label->bound()) {
- int32_t offset = label->offset() - m_buffer.nextOffset().getOffset();
-
- if (BOffImm16::IsInRange(offset))
- jumpKind = ShortJump;
-
- if (jumpKind == ShortJump) {
- MOZ_ASSERT(BOffImm16::IsInRange(offset));
- code.setBOffImm16(BOffImm16(offset));
- writeInst(code.encode());
- as_nop();
- return;
- }
-
- if (code.encode() == inst_beq.encode()) {
- // Handle mixed jump
- addMixedJump(nextOffset(), ImmPtr((void*)label->offset()));
- as_j(JOffImm26(0));
- as_nop();
- return;
- }
-
- // Handle long conditional branch
- writeInst(invertBranch(code, BOffImm16(4 * sizeof(uint32_t))).encode());
- as_nop();
- addMixedJump(nextOffset(), ImmPtr((void*)label->offset()));
- as_j(JOffImm26(0));
- as_nop();
- return;
- }
-
- // Generate open jump and link it to a label.
-
- // Second word holds a pointer to the next branch in label's chain.
- uint32_t nextInChain = label->used() ? label->offset() : LabelBase::INVALID_OFFSET;
-
- // Make the whole branch continous in the buffer.
- m_buffer.ensureSpace(4 * sizeof(uint32_t));
-
- if (jumpKind == ShortJump) {
- // Indicate that this is short jump with offset 4.
- code.setBOffImm16(BOffImm16(4));
- }
- BufferOffset bo = writeInst(code.encode());
- writeInst(nextInChain);
- if (!oom())
- label->use(bo.getOffset());
- if (jumpKind != ShortJump && code.encode() != inst_beq.encode()) {
- as_nop();
- as_nop();
- }
-}
-
void
MacroAssemblerMIPS::ma_cmp_set(Register rd, Register rs, Address addr, Condition c)
{
--
cgit v1.2.3
From b878a54a2f977bbc6761737284cc730a94643ae9 Mon Sep 17 00:00:00 2001
From: Jiaxun Yang <jiaxun.yang@flygoat.com>
Date: Tue, 12 May 2020 12:40:10 +0800
Subject: Bug 1271968 - IonMonkey: MIPS: Refactor addMixedJump.
Tag: #1542
---
js/src/jit/mips32/MacroAssembler-mips32.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
(limited to 'js/src/jit/mips32/MacroAssembler-mips32.cpp')
diff --git a/js/src/jit/mips32/MacroAssembler-mips32.cpp b/js/src/jit/mips32/MacroAssembler-mips32.cpp
index 46e52f132..b4a148d8f 100644
--- a/js/src/jit/mips32/MacroAssembler-mips32.cpp
+++ b/js/src/jit/mips32/MacroAssembler-mips32.cpp
@@ -1498,7 +1498,7 @@ MacroAssemblerMIPSCompat::jumpWithPatch(RepatchLabel* label, Label* documentatio
BufferOffset bo = nextOffset();
label->use(bo.getOffset());
if (label->bound())
- addMixedJump(bo, ImmPtr((void*)label->offset()), MixedJumpPatch::PATCHABLE);
+ addMixedJump(bo, label->offset(), MixedJumpPatch::PATCHABLE);
as_j(JOffImm26(0));
as_nop();
return CodeOffsetJump(bo.getOffset());
--
cgit v1.2.3
From 9679f714f7c3a1da7af0ddd1c2005f8f7ffd039b Mon Sep 17 00:00:00 2001
From: Jiaxun Yang <jiaxun.yang@flygoat.com>
Date: Tue, 12 May 2020 12:40:13 +0800
Subject: Bug 1441521 : [MIPS] Optimize comparation with small constants
Tag: #1542
---
js/src/jit/mips32/MacroAssembler-mips32.cpp | 13 -------------
1 file changed, 13 deletions(-)
(limited to 'js/src/jit/mips32/MacroAssembler-mips32.cpp')
diff --git a/js/src/jit/mips32/MacroAssembler-mips32.cpp b/js/src/jit/mips32/MacroAssembler-mips32.cpp
index b4a148d8f..7472ed78b 100644
--- a/js/src/jit/mips32/MacroAssembler-mips32.cpp
+++ b/js/src/jit/mips32/MacroAssembler-mips32.cpp
@@ -503,19 +503,6 @@ MacroAssemblerMIPS::ma_b(Address addr, ImmGCPtr imm, Label* label, Condition c,
ma_b(SecondScratchReg, imm, label, c, jumpKind);
}
-void
-MacroAssemblerMIPS::ma_cmp_set(Register rd, Register rs, Address addr, Condition c)
-{
- ma_lw(ScratchRegister, addr);
- ma_cmp_set(rd, rs, ScratchRegister, c);
-}
-
-void
-MacroAssemblerMIPS::ma_cmp_set(Register dst, Address lhs, Register rhs, Condition c)
-{
- ma_lw(ScratchRegister, lhs);
- ma_cmp_set(dst, ScratchRegister, rhs, c);
-}
// fp instructions
void
--
cgit v1.2.3
From 32a4d5c41609ebe01ce08285f8e4996403199bbc Mon Sep 17 00:00:00 2001
From: Jiaxun Yang <jiaxun.yang@flygoat.com>
Date: Tue, 12 May 2020 12:40:14 +0800
Subject: Bug 1412030 - [MIPS] Emit wasm memory access information
Tag: #1542
---
js/src/jit/mips32/MacroAssembler-mips32.cpp | 60 +++++++++++++++++------------
1 file changed, 36 insertions(+), 24 deletions(-)
(limited to 'js/src/jit/mips32/MacroAssembler-mips32.cpp')
diff --git a/js/src/jit/mips32/MacroAssembler-mips32.cpp b/js/src/jit/mips32/MacroAssembler-mips32.cpp
index 7472ed78b..94aef3f4d 100644
--- a/js/src/jit/mips32/MacroAssembler-mips32.cpp
+++ b/js/src/jit/mips32/MacroAssembler-mips32.cpp
@@ -801,26 +801,32 @@ MacroAssemblerMIPSCompat::loadDouble(const BaseIndex& src, FloatRegister dest)
}
void
-MacroAssemblerMIPSCompat::loadUnalignedDouble(const BaseIndex& src, Register temp,
- FloatRegister dest)
+MacroAssemblerMIPSCompat::loadUnalignedDouble(const wasm::MemoryAccessDesc& access,
+ const BaseIndex& src, Register temp, FloatRegister dest)
{
computeScaledAddress(src, SecondScratchReg);
+ uint32_t framePushed = asMasm().framePushed();
+ BufferOffset load;
if (Imm16::IsInSignedRange(src.offset) && Imm16::IsInSignedRange(src.offset + 7)) {
- as_lwl(temp, SecondScratchReg, src.offset + INT64LOW_OFFSET + 3);
+ load = as_lwl(temp, SecondScratchReg, src.offset + INT64LOW_OFFSET + 3);
as_lwr(temp, SecondScratchReg, src.offset + INT64LOW_OFFSET);
+ append(access, load.getOffset(), framePushed);
moveToDoubleLo(temp, dest);
- as_lwl(temp, SecondScratchReg, src.offset + INT64HIGH_OFFSET + 3);
+ load = as_lwl(temp, SecondScratchReg, src.offset + INT64HIGH_OFFSET + 3);
as_lwr(temp, SecondScratchReg, src.offset + INT64HIGH_OFFSET);
+ append(access, load.getOffset(), framePushed);
moveToDoubleHi(temp, dest);
} else {
ma_li(ScratchRegister, Imm32(src.offset));
as_daddu(ScratchRegister, SecondScratchReg, ScratchRegister);
- as_lwl(temp, ScratchRegister, INT64LOW_OFFSET + 3);
+ load = as_lwl(temp, ScratchRegister, INT64LOW_OFFSET + 3);
as_lwr(temp, ScratchRegister, INT64LOW_OFFSET);
+ append(access, load.getOffset(), framePushed);
moveToDoubleLo(temp, dest);
- as_lwl(temp, ScratchRegister, INT64HIGH_OFFSET + 3);
+ load = as_lwl(temp, ScratchRegister, INT64HIGH_OFFSET + 3);
as_lwr(temp, ScratchRegister, INT64HIGH_OFFSET);
+ append(access, load.getOffset(), framePushed);
moveToDoubleHi(temp, dest);
}
}
@@ -853,21 +859,21 @@ MacroAssemblerMIPSCompat::loadFloat32(const BaseIndex& src, FloatRegister dest)
}
void
-MacroAssemblerMIPSCompat::loadUnalignedFloat32(const BaseIndex& src, Register temp,
- FloatRegister dest)
+MacroAssemblerMIPSCompat::loadUnalignedFloat32(const wasm::MemoryAccessDesc& access,
+ const BaseIndex& src, Register temp, FloatRegister dest)
{
computeScaledAddress(src, SecondScratchReg);
-
+ BufferOffset load;
if (Imm16::IsInSignedRange(src.offset) && Imm16::IsInSignedRange(src.offset + 3)) {
- as_lwl(temp, SecondScratchReg, src.offset + 3);
+ load = as_lwl(temp, SecondScratchReg, src.offset + 3);
as_lwr(temp, SecondScratchReg, src.offset);
} else {
ma_li(ScratchRegister, Imm32(src.offset));
as_daddu(ScratchRegister, SecondScratchReg, ScratchRegister);
- as_lwl(temp, ScratchRegister, 3);
+ load = as_lwl(temp, ScratchRegister, 3);
as_lwr(temp, ScratchRegister, 0);
}
-
+ append(access, load.getOffset(), asMasm().framePushed());
moveToFloat32(temp, dest);
}
@@ -1005,46 +1011,52 @@ MacroAssemblerMIPSCompat::storePtr(Register src, AbsoluteAddress dest)
}
void
-MacroAssemblerMIPSCompat::storeUnalignedFloat32(FloatRegister src, Register temp,
- const BaseIndex& dest)
+MacroAssemblerMIPSCompat::storeUnalignedFloat32(const wasm::MemoryAccessDesc& access,
+ FloatRegister src, Register temp, const BaseIndex& dest)
{
computeScaledAddress(dest, SecondScratchReg);
moveFromFloat32(src, temp);
+ BufferOffset store;
if (Imm16::IsInSignedRange(dest.offset) && Imm16::IsInSignedRange(dest.offset + 3)) {
- as_swl(temp, SecondScratchReg, dest.offset + 3);
+ store = as_swl(temp, SecondScratchReg, dest.offset + 3);
as_swr(temp, SecondScratchReg, dest.offset);
} else {
ma_li(ScratchRegister, Imm32(dest.offset));
as_daddu(ScratchRegister, SecondScratchReg, ScratchRegister);
- as_swl(temp, ScratchRegister, 3);
+ store = as_swl(temp, ScratchRegister, 3);
as_swr(temp, ScratchRegister, 0);
}
+ append(access, store.getOffset(), asMasm().framePushed());
}
void
-MacroAssemblerMIPSCompat::storeUnalignedDouble(FloatRegister src, Register temp,
- const BaseIndex& dest)
+MacroAssemblerMIPSCompat::storeUnalignedDouble(const wasm::MemoryAccessDesc& access,
+ FloatRegister src, Register temp, const BaseIndex& dest)
{
computeScaledAddress(dest, SecondScratchReg);
+ uint32_t framePushed = asMasm().framePushed();
+ BufferOffset store;
if (Imm16::IsInSignedRange(dest.offset) && Imm16::IsInSignedRange(dest.offset + 7)) {
+ moveFromDoubleHi(src, temp);
+ store = as_swl(temp, SecondScratchReg, dest.offset + INT64HIGH_OFFSET + 3);
+ as_swr(temp, SecondScratchReg, dest.offset + INT64HIGH_OFFSET);
moveFromDoubleLo(src, temp);
as_swl(temp, SecondScratchReg, dest.offset + INT64LOW_OFFSET + 3);
as_swr(temp, SecondScratchReg, dest.offset + INT64LOW_OFFSET);
- moveFromDoubleHi(src, temp);
- as_swl(temp, SecondScratchReg, dest.offset + INT64HIGH_OFFSET + 3);
- as_swr(temp, SecondScratchReg, dest.offset + INT64HIGH_OFFSET);
+
} else {
ma_li(ScratchRegister, Imm32(dest.offset));
as_daddu(ScratchRegister, SecondScratchReg, ScratchRegister);
+ moveFromDoubleHi(src, temp);
+ store = as_swl(temp, ScratchRegister, INT64HIGH_OFFSET + 3);
+ as_swr(temp, ScratchRegister, INT64HIGH_OFFSET);
moveFromDoubleLo(src, temp);
as_swl(temp, ScratchRegister, INT64LOW_OFFSET + 3);
as_swr(temp, ScratchRegister, INT64LOW_OFFSET);
- moveFromDoubleHi(src, temp);
- as_swl(temp, ScratchRegister, INT64HIGH_OFFSET + 3);
- as_swr(temp, ScratchRegister, INT64HIGH_OFFSET);
}
+ append(access, store.getOffset(), framePushed);
}
// Note: this function clobbers the input register.
--
cgit v1.2.3