diff options
Diffstat (limited to 'js/src/jit/mips64')
-rw-r--r-- | js/src/jit/mips64/CodeGenerator-mips64.cpp | 6 | ||||
-rw-r--r-- | js/src/jit/mips64/MacroAssembler-mips64.cpp | 45 | ||||
-rw-r--r-- | js/src/jit/mips64/MacroAssembler-mips64.h | 12 |
3 files changed, 36 insertions, 27 deletions
diff --git a/js/src/jit/mips64/CodeGenerator-mips64.cpp b/js/src/jit/mips64/CodeGenerator-mips64.cpp index d1b6a7a32..862960bdf 100644 --- a/js/src/jit/mips64/CodeGenerator-mips64.cpp +++ b/js/src/jit/mips64/CodeGenerator-mips64.cpp @@ -452,7 +452,7 @@ CodeGeneratorMIPS64::emitWasmLoadI64(T* lir) if (IsUnaligned(mir->access())) { Register temp = ToRegister(lir->getTemp(1)); - masm.ma_load_unaligned(ToOutRegister64(lir).reg, BaseIndex(HeapReg, ptr, TimesOne), + masm.ma_load_unaligned(mir->access(), ToOutRegister64(lir).reg, BaseIndex(HeapReg, ptr, TimesOne), temp, static_cast<LoadStoreSize>(8 * byteSize), isSigned ? SignExtend : ZeroExtend); return; @@ -460,6 +460,7 @@ CodeGeneratorMIPS64::emitWasmLoadI64(T* lir) masm.ma_load(ToOutRegister64(lir).reg, BaseIndex(HeapReg, ptr, TimesOne), static_cast<LoadStoreSize>(8 * byteSize), isSigned ? SignExtend : ZeroExtend); + masm.append(mir->access(), masm.size() - 4, masm.framePushed()); masm.memoryBarrier(mir->access().barrierAfter()); } @@ -517,13 +518,14 @@ CodeGeneratorMIPS64::emitWasmStoreI64(T* lir) if (IsUnaligned(mir->access())) { Register temp = ToRegister(lir->getTemp(1)); - masm.ma_store_unaligned(ToRegister64(lir->value()).reg, BaseIndex(HeapReg, ptr, TimesOne), + masm.ma_store_unaligned(mir->access(), ToRegister64(lir->value()).reg, BaseIndex(HeapReg, ptr, TimesOne), temp, static_cast<LoadStoreSize>(8 * byteSize), isSigned ? SignExtend : ZeroExtend); return; } masm.ma_store(ToRegister64(lir->value()).reg, BaseIndex(HeapReg, ptr, TimesOne), static_cast<LoadStoreSize>(8 * byteSize), isSigned ? SignExtend : ZeroExtend); + masm.append(mir->access(), masm.size() - 4, masm.framePushed()); masm.memoryBarrier(mir->access().barrierAfter()); } diff --git a/js/src/jit/mips64/MacroAssembler-mips64.cpp b/js/src/jit/mips64/MacroAssembler-mips64.cpp index 9604e38a4..424e04306 100644 --- a/js/src/jit/mips64/MacroAssembler-mips64.cpp +++ b/js/src/jit/mips64/MacroAssembler-mips64.cpp @@ -1049,21 +1049,21 @@ MacroAssemblerMIPS64Compat::loadDouble(const BaseIndex& src, FloatRegister dest) } void -MacroAssemblerMIPS64Compat::loadUnalignedDouble(const BaseIndex& src, Register temp, - FloatRegister dest) +MacroAssemblerMIPS64Compat::loadUnalignedDouble(const wasm::MemoryAccessDesc& access, + const BaseIndex& src, Register temp, FloatRegister dest) { computeScaledAddress(src, SecondScratchReg); - + BufferOffset load; if (Imm16::IsInSignedRange(src.offset) && Imm16::IsInSignedRange(src.offset + 7)) { - as_ldl(temp, SecondScratchReg, src.offset + 7); + load = as_ldl(temp, SecondScratchReg, src.offset + 7); as_ldr(temp, SecondScratchReg, src.offset); } else { ma_li(ScratchRegister, Imm32(src.offset)); as_daddu(ScratchRegister, SecondScratchReg, ScratchRegister); - as_ldl(temp, ScratchRegister, 7); + load = as_ldl(temp, ScratchRegister, 7); as_ldr(temp, ScratchRegister, 0); } - + append(access, load.getOffset(), asMasm().framePushed()); moveToDouble(temp, dest); } @@ -1095,21 +1095,21 @@ MacroAssemblerMIPS64Compat::loadFloat32(const BaseIndex& src, FloatRegister dest } void -MacroAssemblerMIPS64Compat::loadUnalignedFloat32(const BaseIndex& src, Register temp, - FloatRegister dest) +MacroAssemblerMIPS64Compat::loadUnalignedFloat32(const wasm::MemoryAccessDesc& access, + const BaseIndex& src, Register temp, FloatRegister dest) { computeScaledAddress(src, SecondScratchReg); - + BufferOffset load; if (Imm16::IsInSignedRange(src.offset) && Imm16::IsInSignedRange(src.offset + 3)) { - as_lwl(temp, SecondScratchReg, src.offset + 3); + load = as_lwl(temp, SecondScratchReg, src.offset + 3); as_lwr(temp, SecondScratchReg, src.offset); } else { ma_li(ScratchRegister, Imm32(src.offset)); as_daddu(ScratchRegister, SecondScratchReg, ScratchRegister); - as_lwl(temp, ScratchRegister, 3); + load = as_lwl(temp, ScratchRegister, 3); as_lwr(temp, ScratchRegister, 0); } - + append(access, load.getOffset(), asMasm().framePushed()); moveToFloat32(temp, dest); } @@ -1251,39 +1251,42 @@ MacroAssemblerMIPS64Compat::storePtr(Register src, AbsoluteAddress dest) } void -MacroAssemblerMIPS64Compat::storeUnalignedFloat32(FloatRegister src, Register temp, - const BaseIndex& dest) +MacroAssemblerMIPS64Compat::storeUnalignedFloat32(const wasm::MemoryAccessDesc& access, + FloatRegister src, Register temp, const BaseIndex& dest) { computeScaledAddress(dest, SecondScratchReg); moveFromFloat32(src, temp); - + BufferOffset store; if (Imm16::IsInSignedRange(dest.offset) && Imm16::IsInSignedRange(dest.offset + 3)) { - as_swl(temp, SecondScratchReg, dest.offset + 3); + store = as_swl(temp, SecondScratchReg, dest.offset + 3); as_swr(temp, SecondScratchReg, dest.offset); } else { ma_li(ScratchRegister, Imm32(dest.offset)); as_daddu(ScratchRegister, SecondScratchReg, ScratchRegister); - as_swl(temp, ScratchRegister, 3); + store = as_swl(temp, ScratchRegister, 3); as_swr(temp, ScratchRegister, 0); } + append(access, store.getOffset(), asMasm().framePushed()); } void -MacroAssemblerMIPS64Compat::storeUnalignedDouble(FloatRegister src, Register temp, - const BaseIndex& dest) +MacroAssemblerMIPS64Compat::storeUnalignedDouble(const wasm::MemoryAccessDesc& access, + FloatRegister src, Register temp, const BaseIndex& dest) { computeScaledAddress(dest, SecondScratchReg); moveFromDouble(src, temp); + BufferOffset store; if (Imm16::IsInSignedRange(dest.offset) && Imm16::IsInSignedRange(dest.offset + 7)) { - as_sdl(temp, SecondScratchReg, dest.offset + 7); + store = as_sdl(temp, SecondScratchReg, dest.offset + 7); as_sdr(temp, SecondScratchReg, dest.offset); } else { ma_li(ScratchRegister, Imm32(dest.offset)); as_daddu(ScratchRegister, SecondScratchReg, ScratchRegister); - as_sdl(temp, ScratchRegister, 7); + store = as_sdl(temp, ScratchRegister, 7); as_sdr(temp, ScratchRegister, 0); } + append(access, store.getOffset(), asMasm().framePushed()); } // Note: this function clobbers the input register. diff --git a/js/src/jit/mips64/MacroAssembler-mips64.h b/js/src/jit/mips64/MacroAssembler-mips64.h index 4991c264f..b50ee7978 100644 --- a/js/src/jit/mips64/MacroAssembler-mips64.h +++ b/js/src/jit/mips64/MacroAssembler-mips64.h @@ -907,7 +907,8 @@ class MacroAssemblerMIPS64Compat : public MacroAssemblerMIPS64 void loadDouble(const Address& addr, FloatRegister dest); void loadDouble(const BaseIndex& src, FloatRegister dest); - void loadUnalignedDouble(const BaseIndex& src, Register temp, FloatRegister dest); + void loadUnalignedDouble(const wasm::MemoryAccessDesc& access, const BaseIndex& src, + Register temp, FloatRegister dest); // Load a float value into a register, then expand it to a double. void loadFloatAsDouble(const Address& addr, FloatRegister dest); @@ -915,7 +916,8 @@ class MacroAssemblerMIPS64Compat : public MacroAssemblerMIPS64 void loadFloat32(const Address& addr, FloatRegister dest); void loadFloat32(const BaseIndex& src, FloatRegister dest); - void loadUnalignedFloat32(const BaseIndex& src, Register temp, FloatRegister dest); + void loadUnalignedFloat32(const wasm::MemoryAccessDesc& access, const BaseIndex& src, + Register temp, FloatRegister dest); void store8(Register src, const Address& address); void store8(Imm32 imm, const Address& address); @@ -954,8 +956,10 @@ class MacroAssemblerMIPS64Compat : public MacroAssemblerMIPS64 void storePtr(Register src, const BaseIndex& address); void storePtr(Register src, AbsoluteAddress dest); - void storeUnalignedFloat32(FloatRegister src, Register temp, const BaseIndex& dest); - void storeUnalignedDouble(FloatRegister src, Register temp, const BaseIndex& dest); + void storeUnalignedFloat32(const wasm::MemoryAccessDesc& access, FloatRegister src, + Register temp, const BaseIndex& dest); + void storeUnalignedDouble(const wasm::MemoryAccessDesc& access, FloatRegister src, + Register temp, const BaseIndex& dest); void moveDouble(FloatRegister src, FloatRegister dest) { as_movd(dest, src); |