diff options
Diffstat (limited to 'js/src/jit/mips-shared')
-rw-r--r-- | js/src/jit/mips-shared/Assembler-mips-shared.h | 6 | ||||
-rw-r--r-- | js/src/jit/mips-shared/CodeGenerator-mips-shared.cpp | 4 | ||||
-rw-r--r-- | js/src/jit/mips-shared/Lowering-mips-shared.cpp | 4 |
3 files changed, 10 insertions, 4 deletions
diff --git a/js/src/jit/mips-shared/Assembler-mips-shared.h b/js/src/jit/mips-shared/Assembler-mips-shared.h index 5a47eb1dc..4cfb30117 100644 --- a/js/src/jit/mips-shared/Assembler-mips-shared.h +++ b/js/src/jit/mips-shared/Assembler-mips-shared.h @@ -1547,6 +1547,12 @@ class InstGS : public Instruction { } }; +inline bool +IsUnaligned(const wasm::MemoryAccessDesc& access) +{ + return access.align() && access.align() < access.byteSize(); +} + } // namespace jit } // namespace js diff --git a/js/src/jit/mips-shared/CodeGenerator-mips-shared.cpp b/js/src/jit/mips-shared/CodeGenerator-mips-shared.cpp index 1a5a3987b..2526fc237 100644 --- a/js/src/jit/mips-shared/CodeGenerator-mips-shared.cpp +++ b/js/src/jit/mips-shared/CodeGenerator-mips-shared.cpp @@ -1915,7 +1915,7 @@ CodeGeneratorMIPSShared::emitWasmLoad(T* lir) BaseIndex address(HeapReg, ptr, TimesOne); - if (mir->access().isUnaligned()) { + if (IsUnaligned(mir->access())) { Register temp = ToRegister(lir->getTemp(1)); if (isFloat) { @@ -2000,7 +2000,7 @@ CodeGeneratorMIPSShared::emitWasmStore(T* lir) BaseIndex address(HeapReg, ptr, TimesOne); - if (mir->access().isUnaligned()) { + if (IsUnaligned(mir->access())) { Register temp = ToRegister(lir->getTemp(1)); if (isFloat) { diff --git a/js/src/jit/mips-shared/Lowering-mips-shared.cpp b/js/src/jit/mips-shared/Lowering-mips-shared.cpp index f328d16f7..8c78f56b7 100644 --- a/js/src/jit/mips-shared/Lowering-mips-shared.cpp +++ b/js/src/jit/mips-shared/Lowering-mips-shared.cpp @@ -324,7 +324,7 @@ LIRGeneratorMIPSShared::visitWasmLoad(MWasmLoad* ins) LAllocation ptr = useRegisterAtStart(base); - if (ins->access().isUnaligned()) { + if (IsUnaligned(ins->access())) { if (ins->type() == MIRType::Int64) { auto* lir = new(alloc()) LWasmUnalignedLoadI64(ptr, temp()); if (ins->access().offset()) @@ -367,7 +367,7 @@ LIRGeneratorMIPSShared::visitWasmStore(MWasmStore* ins) MDefinition* value = ins->value(); LAllocation baseAlloc = useRegisterAtStart(base); - if (ins->access().isUnaligned()) { + if (IsUnaligned(ins->access())) { if (ins->type() == MIRType::Int64) { LInt64Allocation valueAlloc = useInt64RegisterAtStart(value); auto* lir = new(alloc()) LWasmUnalignedStoreI64(baseAlloc, valueAlloc, temp()); |