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author | trav90 <travawine@palemoon.org> | 2018-10-18 21:53:44 -0500 |
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committer | trav90 <travawine@palemoon.org> | 2018-10-18 21:53:44 -0500 |
commit | ec910d81405c736a4490383a250299a7837c2e64 (patch) | |
tree | 4f27cc226f93a863121aef6c56313e4153a69b3e /third_party/aom/av1/encoder/speed_features.c | |
parent | 01eb57073ba97b2d6cbf20f745dfcc508197adc3 (diff) | |
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Update aom to commit id e87fb2378f01103d5d6e477a4ef6892dc714e614
Diffstat (limited to 'third_party/aom/av1/encoder/speed_features.c')
-rw-r--r-- | third_party/aom/av1/encoder/speed_features.c | 17 |
1 files changed, 7 insertions, 10 deletions
diff --git a/third_party/aom/av1/encoder/speed_features.c b/third_party/aom/av1/encoder/speed_features.c index eeab33a95..5608d031e 100644 --- a/third_party/aom/av1/encoder/speed_features.c +++ b/third_party/aom/av1/encoder/speed_features.c @@ -172,20 +172,20 @@ static void set_good_speed_features_framesize_independent(AV1_COMP *cpi, #if CONFIG_TX64X64 sf->intra_y_mode_mask[TX_64X64] = INTRA_DC_H_V; #if CONFIG_CFL - sf->intra_uv_mode_mask[TX_64X64] = UV_INTRA_DC_H_V; + sf->intra_uv_mode_mask[TX_64X64] = UV_INTRA_DC_H_V_CFL; #else sf->intra_uv_mode_mask[TX_64X64] = INTRA_DC_H_V; #endif // CONFIG_CFL #endif // CONFIG_TX64X64 sf->intra_y_mode_mask[TX_32X32] = INTRA_DC_H_V; #if CONFIG_CFL - sf->intra_uv_mode_mask[TX_32X32] = UV_INTRA_DC_H_V; + sf->intra_uv_mode_mask[TX_32X32] = UV_INTRA_DC_H_V_CFL; #else sf->intra_uv_mode_mask[TX_32X32] = INTRA_DC_H_V; #endif sf->intra_y_mode_mask[TX_16X16] = INTRA_DC_H_V; #if CONFIG_CFL - sf->intra_uv_mode_mask[TX_16X16] = UV_INTRA_DC_H_V; + sf->intra_uv_mode_mask[TX_16X16] = UV_INTRA_DC_H_V_CFL; #else sf->intra_uv_mode_mask[TX_16X16] = INTRA_DC_H_V; #endif @@ -196,10 +196,8 @@ static void set_good_speed_features_framesize_independent(AV1_COMP *cpi, // Use transform domain distortion. // Note var-tx expt always uses pixel domain distortion. sf->use_transform_domain_distortion = 1; -#if CONFIG_EXT_INTER sf->disable_wedge_search_var_thresh = 100; sf->fast_wedge_sign_estimate = 1; -#endif // CONFIG_EXT_INTER } if (speed >= 3) { @@ -240,14 +238,14 @@ static void set_good_speed_features_framesize_independent(AV1_COMP *cpi, #if CONFIG_TX64X64 sf->intra_y_mode_mask[TX_64X64] = INTRA_DC; #if CONFIG_CFL - sf->intra_uv_mode_mask[TX_64X64] = UV_INTRA_DC; + sf->intra_uv_mode_mask[TX_64X64] = UV_INTRA_DC_CFL; #else sf->intra_uv_mode_mask[TX_64X64] = INTRA_DC; #endif // CONFIG_CFL #endif // CONFIG_TX64X64 sf->intra_y_mode_mask[TX_32X32] = INTRA_DC; #if CONFIG_CFL - sf->intra_uv_mode_mask[TX_32X32] = UV_INTRA_DC; + sf->intra_uv_mode_mask[TX_32X32] = UV_INTRA_DC_CFL; #else sf->intra_uv_mode_mask[TX_32X32] = INTRA_DC; #endif // CONFIG_CFL @@ -276,7 +274,7 @@ static void set_good_speed_features_framesize_independent(AV1_COMP *cpi, for (i = 0; i < TX_SIZES; ++i) { sf->intra_y_mode_mask[i] = INTRA_DC; #if CONFIG_CFL - sf->intra_uv_mode_mask[i] = UV_INTRA_DC; + sf->intra_uv_mode_mask[i] = UV_INTRA_DC_CFL; #else sf->intra_uv_mode_mask[i] = INTRA_DC; #endif // CONFIG_CFL @@ -404,6 +402,7 @@ void av1_set_speed_features_framesize_independent(AV1_COMP *cpi) { sf->alt_ref_search_fp = 0; sf->partition_search_type = SEARCH_PARTITION; sf->tx_type_search.prune_mode = NO_PRUNE; + sf->tx_type_search.use_skip_flag_prediction = 1; sf->tx_type_search.fast_intra_tx_type_search = 0; sf->tx_type_search.fast_inter_tx_type_search = 0; sf->less_rectangular_check = 0; @@ -422,10 +421,8 @@ void av1_set_speed_features_framesize_independent(AV1_COMP *cpi) { sf->adaptive_interp_filter_search = 0; sf->allow_partition_search_skip = 0; sf->use_upsampled_references = 1; -#if CONFIG_EXT_INTER sf->disable_wedge_search_var_thresh = 0; sf->fast_wedge_sign_estimate = 0; -#endif // CONFIG_EXT_INTER for (i = 0; i < TX_SIZES; i++) { sf->intra_y_mode_mask[i] = INTRA_ALL; |