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authortrav90 <travawine@palemoon.org>2018-10-18 21:53:44 -0500
committertrav90 <travawine@palemoon.org>2018-10-18 21:53:44 -0500
commitec910d81405c736a4490383a250299a7837c2e64 (patch)
tree4f27cc226f93a863121aef6c56313e4153a69b3e /third_party/aom/av1/common/av1_inv_txfm2d.c
parent01eb57073ba97b2d6cbf20f745dfcc508197adc3 (diff)
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Update aom to commit id e87fb2378f01103d5d6e477a4ef6892dc714e614
Diffstat (limited to 'third_party/aom/av1/common/av1_inv_txfm2d.c')
-rw-r--r--third_party/aom/av1/common/av1_inv_txfm2d.c244
1 files changed, 212 insertions, 32 deletions
diff --git a/third_party/aom/av1/common/av1_inv_txfm2d.c b/third_party/aom/av1/common/av1_inv_txfm2d.c
index 58845f19b..031d11b40 100644
--- a/third_party/aom/av1/common/av1_inv_txfm2d.c
+++ b/third_party/aom/av1/common/av1_inv_txfm2d.c
@@ -22,6 +22,9 @@ static INLINE TxfmFunc inv_txfm_type_to_func(TXFM_TYPE txfm_type) {
case TXFM_TYPE_DCT8: return av1_idct8_new;
case TXFM_TYPE_DCT16: return av1_idct16_new;
case TXFM_TYPE_DCT32: return av1_idct32_new;
+#if CONFIG_TX64X64
+ case TXFM_TYPE_DCT64: return av1_idct64_new;
+#endif // CONFIG_TX64X64
case TXFM_TYPE_ADST4: return av1_iadst4_new;
case TXFM_TYPE_ADST8: return av1_iadst8_new;
case TXFM_TYPE_ADST16: return av1_iadst16_new;
@@ -31,6 +34,9 @@ static INLINE TxfmFunc inv_txfm_type_to_func(TXFM_TYPE txfm_type) {
case TXFM_TYPE_IDENTITY8: return av1_iidentity8_c;
case TXFM_TYPE_IDENTITY16: return av1_iidentity16_c;
case TXFM_TYPE_IDENTITY32: return av1_iidentity32_c;
+#if CONFIG_TX64X64
+ case TXFM_TYPE_IDENTITY64: return av1_iidentity64_c;
+#endif // CONFIG_TX64X64
#endif // CONFIG_EXT_TX
default: assert(0); return NULL;
}
@@ -43,14 +49,22 @@ static const TXFM_1D_CFG *inv_txfm_col_cfg_ls[TX_TYPES_1D][TX_SIZES] = {
NULL,
#endif
&inv_txfm_1d_col_cfg_dct_4, &inv_txfm_1d_col_cfg_dct_8,
- &inv_txfm_1d_col_cfg_dct_16, &inv_txfm_1d_col_cfg_dct_32 },
+ &inv_txfm_1d_col_cfg_dct_16, &inv_txfm_1d_col_cfg_dct_32,
+#if CONFIG_TX64X64
+ &inv_txfm_1d_col_cfg_dct_64
+#endif // CONFIG_TX64X64
+ },
// ADST
{
#if CONFIG_CHROMA_2X2
NULL,
#endif
&inv_txfm_1d_col_cfg_adst_4, &inv_txfm_1d_col_cfg_adst_8,
- &inv_txfm_1d_col_cfg_adst_16, &inv_txfm_1d_col_cfg_adst_32 },
+ &inv_txfm_1d_col_cfg_adst_16, &inv_txfm_1d_col_cfg_adst_32,
+#if CONFIG_TX64X64
+ NULL
+#endif // CONFIG_TX64X64
+ },
#if CONFIG_EXT_TX
// FLIPADST
{
@@ -58,14 +72,22 @@ static const TXFM_1D_CFG *inv_txfm_col_cfg_ls[TX_TYPES_1D][TX_SIZES] = {
NULL,
#endif
&inv_txfm_1d_col_cfg_adst_4, &inv_txfm_1d_col_cfg_adst_8,
- &inv_txfm_1d_col_cfg_adst_16, &inv_txfm_1d_col_cfg_adst_32 },
+ &inv_txfm_1d_col_cfg_adst_16, &inv_txfm_1d_col_cfg_adst_32,
+#if CONFIG_TX64X64
+ NULL
+#endif // CONFIG_TX64X64
+ },
// IDENTITY
{
#if CONFIG_CHROMA_2X2
NULL,
#endif
&inv_txfm_1d_cfg_identity_4, &inv_txfm_1d_cfg_identity_8,
- &inv_txfm_1d_cfg_identity_16, &inv_txfm_1d_cfg_identity_32 },
+ &inv_txfm_1d_cfg_identity_16, &inv_txfm_1d_cfg_identity_32,
+#if CONFIG_TX64X64
+ &inv_txfm_1d_cfg_identity_64
+#endif // CONFIG_TX64X64
+ },
#endif // CONFIG_EXT_TX
};
@@ -76,14 +98,22 @@ static const TXFM_1D_CFG *inv_txfm_row_cfg_ls[TX_TYPES_1D][TX_SIZES] = {
NULL,
#endif
&inv_txfm_1d_row_cfg_dct_4, &inv_txfm_1d_row_cfg_dct_8,
- &inv_txfm_1d_row_cfg_dct_16, &inv_txfm_1d_row_cfg_dct_32 },
+ &inv_txfm_1d_row_cfg_dct_16, &inv_txfm_1d_row_cfg_dct_32,
+#if CONFIG_TX64X64
+ &inv_txfm_1d_row_cfg_dct_64,
+#endif // CONFIG_TX64X64
+ },
// ADST
{
#if CONFIG_CHROMA_2X2
NULL,
#endif
&inv_txfm_1d_row_cfg_adst_4, &inv_txfm_1d_row_cfg_adst_8,
- &inv_txfm_1d_row_cfg_adst_16, &inv_txfm_1d_row_cfg_adst_32 },
+ &inv_txfm_1d_row_cfg_adst_16, &inv_txfm_1d_row_cfg_adst_32,
+#if CONFIG_TX64X64
+ NULL
+#endif // CONFIG_TX64X64
+ },
#if CONFIG_EXT_TX
// FLIPADST
{
@@ -91,30 +121,39 @@ static const TXFM_1D_CFG *inv_txfm_row_cfg_ls[TX_TYPES_1D][TX_SIZES] = {
NULL,
#endif
&inv_txfm_1d_row_cfg_adst_4, &inv_txfm_1d_row_cfg_adst_8,
- &inv_txfm_1d_row_cfg_adst_16, &inv_txfm_1d_row_cfg_adst_32 },
+ &inv_txfm_1d_row_cfg_adst_16, &inv_txfm_1d_row_cfg_adst_32,
+#if CONFIG_TX64X64
+ NULL
+#endif // CONFIG_TX64X64
+ },
// IDENTITY
{
#if CONFIG_CHROMA_2X2
NULL,
#endif
&inv_txfm_1d_cfg_identity_4, &inv_txfm_1d_cfg_identity_8,
- &inv_txfm_1d_cfg_identity_16, &inv_txfm_1d_cfg_identity_32 },
+ &inv_txfm_1d_cfg_identity_16, &inv_txfm_1d_cfg_identity_32,
+#if CONFIG_TX64X64
+ &inv_txfm_1d_cfg_identity_64
+#endif // CONFIG_TX64X64
+ },
#endif // CONFIG_EXT_TX
};
-TXFM_2D_FLIP_CFG av1_get_inv_txfm_cfg(int tx_type, int tx_size) {
+TXFM_2D_FLIP_CFG av1_get_inv_txfm_cfg(TX_TYPE tx_type, TX_SIZE tx_size) {
TXFM_2D_FLIP_CFG cfg;
set_flip_cfg(tx_type, &cfg);
- const int tx_type_col = vtx_tab[tx_type];
- const int tx_type_row = htx_tab[tx_type];
- const int tx_size_col = txsize_vert_map[tx_size];
- const int tx_size_row = txsize_horz_map[tx_size];
+ const TX_TYPE_1D tx_type_col = vtx_tab[tx_type];
+ const TX_TYPE_1D tx_type_row = htx_tab[tx_type];
+ const TX_SIZE tx_size_col = txsize_vert_map[tx_size];
+ const TX_SIZE tx_size_row = txsize_horz_map[tx_size];
cfg.col_cfg = inv_txfm_col_cfg_ls[tx_type_col][tx_size_col];
cfg.row_cfg = inv_txfm_row_cfg_ls[tx_type_row][tx_size_row];
return cfg;
}
-TXFM_2D_FLIP_CFG av1_get_inv_txfm_64x64_cfg(int tx_type) {
+#if CONFIG_TX64X64
+TXFM_2D_FLIP_CFG av1_get_inv_txfm_64x64_cfg(TX_TYPE tx_type) {
TXFM_2D_FLIP_CFG cfg = { 0, 0, NULL, NULL };
switch (tx_type) {
case DCT_DCT:
@@ -127,9 +166,62 @@ TXFM_2D_FLIP_CFG av1_get_inv_txfm_64x64_cfg(int tx_type) {
return cfg;
}
+TXFM_2D_FLIP_CFG av1_get_inv_txfm_32x64_cfg(int tx_type) {
+ TXFM_2D_FLIP_CFG cfg = { 0, 0, NULL, NULL };
+ switch (tx_type) {
+ case DCT_DCT:
+ cfg.col_cfg = &inv_txfm_1d_col_cfg_dct_64;
+ cfg.row_cfg = &inv_txfm_1d_row_cfg_dct_32;
+ set_flip_cfg(tx_type, &cfg);
+ break;
+ default: assert(0);
+ }
+ return cfg;
+}
+
+TXFM_2D_FLIP_CFG av1_get_inv_txfm_64x32_cfg(int tx_type) {
+ TXFM_2D_FLIP_CFG cfg = { 0, 0, NULL, NULL };
+ switch (tx_type) {
+ case DCT_DCT:
+ cfg.col_cfg = &inv_txfm_1d_col_cfg_dct_32;
+ cfg.row_cfg = &inv_txfm_1d_row_cfg_dct_64;
+ set_flip_cfg(tx_type, &cfg);
+ break;
+ default: assert(0);
+ }
+ return cfg;
+}
+#endif // CONFIG_TX64X64
+
+void av1_gen_inv_stage_range(int8_t *stage_range_col, int8_t *stage_range_row,
+ const TXFM_2D_FLIP_CFG *cfg, int8_t fwd_shift,
+ int bd) {
+ // Note when assigning txfm_size_col, we use the txfm_size from the
+ // row configuration and vice versa. This is intentionally done to
+ // accurately perform rectangular transforms. When the transform is
+ // rectangular, the number of columns will be the same as the
+ // txfm_size stored in the row cfg struct. It will make no difference
+ // for square transforms.
+ const int txfm_size_col = cfg->row_cfg->txfm_size;
+ const int txfm_size_row = cfg->col_cfg->txfm_size;
+ // Take the shift from the larger dimension in the rectangular case.
+ const int8_t *shift = (txfm_size_col > txfm_size_row) ? cfg->row_cfg->shift
+ : cfg->col_cfg->shift;
+ // i < MAX_TXFM_STAGE_NUM will mute above array bounds warning
+ for (int i = 0; i < cfg->row_cfg->stage_num && i < MAX_TXFM_STAGE_NUM; ++i) {
+ stage_range_row[i] = cfg->row_cfg->stage_range[i] + fwd_shift + bd + 1;
+ }
+ // i < MAX_TXFM_STAGE_NUM will mute above array bounds warning
+ for (int i = 0; i < cfg->col_cfg->stage_num && i < MAX_TXFM_STAGE_NUM; ++i) {
+ stage_range_col[i] =
+ cfg->col_cfg->stage_range[i] + fwd_shift + shift[0] + bd + 1;
+ }
+}
+
static INLINE void inv_txfm2d_add_c(const int32_t *input, uint16_t *output,
int stride, TXFM_2D_FLIP_CFG *cfg,
- int32_t *txfm_buf, int bd) {
+ int32_t *txfm_buf, int8_t fwd_shift,
+ int bd) {
// Note when assigning txfm_size_col, we use the txfm_size from the
// row configuration and vice versa. This is intentionally done to
// accurately perform rectangular transforms. When the transform is
@@ -141,8 +233,12 @@ static INLINE void inv_txfm2d_add_c(const int32_t *input, uint16_t *output,
// Take the shift from the larger dimension in the rectangular case.
const int8_t *shift = (txfm_size_col > txfm_size_row) ? cfg->row_cfg->shift
: cfg->col_cfg->shift;
- const int8_t *stage_range_col = cfg->col_cfg->stage_range;
- const int8_t *stage_range_row = cfg->row_cfg->stage_range;
+ int8_t stage_range_row[MAX_TXFM_STAGE_NUM];
+ int8_t stage_range_col[MAX_TXFM_STAGE_NUM];
+ assert(cfg->row_cfg->stage_num <= MAX_TXFM_STAGE_NUM);
+ assert(cfg->col_cfg->stage_num <= MAX_TXFM_STAGE_NUM);
+ av1_gen_inv_stage_range(stage_range_col, stage_range_row, cfg, fwd_shift, bd);
+
const int8_t *cos_bit_col = cfg->col_cfg->cos_bit;
const int8_t *cos_bit_row = cfg->row_cfg->cos_bit;
const TxfmFunc txfm_func_col = inv_txfm_type_to_func(cfg->col_cfg->txfm_type);
@@ -198,74 +294,158 @@ static INLINE void inv_txfm2d_add_c(const int32_t *input, uint16_t *output,
static INLINE void inv_txfm2d_add_facade(const int32_t *input, uint16_t *output,
int stride, int32_t *txfm_buf,
- int tx_type, int tx_size, int bd) {
+ TX_TYPE tx_type, TX_SIZE tx_size,
+ int bd) {
TXFM_2D_FLIP_CFG cfg = av1_get_inv_txfm_cfg(tx_type, tx_size);
- inv_txfm2d_add_c(input, output, stride, &cfg, txfm_buf, bd);
+ TX_SIZE tx_size_sqr = txsize_sqr_map[tx_size];
+ inv_txfm2d_add_c(input, output, stride, &cfg, txfm_buf,
+ fwd_shift_sum[tx_size_sqr], bd);
}
void av1_inv_txfm2d_add_4x8_c(const int32_t *input, uint16_t *output,
- int stride, int tx_type, int bd) {
+ int stride, TX_TYPE tx_type, int bd) {
int txfm_buf[4 * 8 + 8 + 8];
inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_4X8, bd);
}
void av1_inv_txfm2d_add_8x4_c(const int32_t *input, uint16_t *output,
- int stride, int tx_type, int bd) {
+ int stride, TX_TYPE tx_type, int bd) {
+#if CONFIG_TXMG
+ int txfm_buf[8 * 4 + 8 + 8];
+ int32_t rinput[8 * 4];
+ uint16_t routput[8 * 4];
+ TX_SIZE tx_size = TX_8X4;
+ TX_SIZE rtx_size = av1_rotate_tx_size(tx_size);
+ TX_TYPE rtx_type = av1_rotate_tx_type(tx_type);
+ int w = tx_size_wide[tx_size];
+ int h = tx_size_high[tx_size];
+ int rw = h;
+ int rh = w;
+ transpose_int32(rinput, rw, input, w, w, h);
+ transpose_uint16(routput, rw, output, stride, w, h);
+ inv_txfm2d_add_facade(rinput, routput, rw, txfm_buf, rtx_type, rtx_size, bd);
+ transpose_uint16(output, stride, routput, rw, rw, rh);
+#else
int txfm_buf[8 * 4 + 4 + 4];
inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_8X4, bd);
+#endif
}
void av1_inv_txfm2d_add_8x16_c(const int32_t *input, uint16_t *output,
- int stride, int tx_type, int bd) {
+ int stride, TX_TYPE tx_type, int bd) {
int txfm_buf[8 * 16 + 16 + 16];
inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_8X16, bd);
}
void av1_inv_txfm2d_add_16x8_c(const int32_t *input, uint16_t *output,
- int stride, int tx_type, int bd) {
+ int stride, TX_TYPE tx_type, int bd) {
+#if CONFIG_TXMG
+ int txfm_buf[16 * 8 + 16 + 16];
+ int32_t rinput[16 * 8];
+ uint16_t routput[16 * 8];
+ TX_SIZE tx_size = TX_16X8;
+ TX_SIZE rtx_size = av1_rotate_tx_size(tx_size);
+ TX_TYPE rtx_type = av1_rotate_tx_type(tx_type);
+ int w = tx_size_wide[tx_size];
+ int h = tx_size_high[tx_size];
+ int rw = h;
+ int rh = w;
+ transpose_int32(rinput, rw, input, w, w, h);
+ transpose_uint16(routput, rw, output, stride, w, h);
+ inv_txfm2d_add_facade(rinput, routput, rw, txfm_buf, rtx_type, rtx_size, bd);
+ transpose_uint16(output, stride, routput, rw, rw, rh);
+#else
int txfm_buf[16 * 8 + 8 + 8];
inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_16X8, bd);
+#endif
}
void av1_inv_txfm2d_add_16x32_c(const int32_t *input, uint16_t *output,
- int stride, int tx_type, int bd) {
+ int stride, TX_TYPE tx_type, int bd) {
int txfm_buf[16 * 32 + 32 + 32];
inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_16X32, bd);
}
void av1_inv_txfm2d_add_32x16_c(const int32_t *input, uint16_t *output,
- int stride, int tx_type, int bd) {
+ int stride, TX_TYPE tx_type, int bd) {
+#if CONFIG_TXMG
+ int txfm_buf[32 * 16 + 32 + 32];
+ int32_t rinput[32 * 16];
+ uint16_t routput[32 * 16];
+ TX_SIZE tx_size = TX_32X16;
+ TX_SIZE rtx_size = av1_rotate_tx_size(tx_size);
+ TX_TYPE rtx_type = av1_rotate_tx_type(tx_type);
+ int w = tx_size_wide[tx_size];
+ int h = tx_size_high[tx_size];
+ int rw = h;
+ int rh = w;
+ transpose_int32(rinput, rw, input, w, w, h);
+ transpose_uint16(routput, rw, output, stride, w, h);
+ inv_txfm2d_add_facade(rinput, routput, rw, txfm_buf, rtx_type, rtx_size, bd);
+ transpose_uint16(output, stride, routput, rw, rw, rh);
+#else
int txfm_buf[32 * 16 + 16 + 16];
inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_32X16, bd);
+#endif
}
void av1_inv_txfm2d_add_4x4_c(const int32_t *input, uint16_t *output,
- int stride, int tx_type, int bd) {
+ int stride, TX_TYPE tx_type, int bd) {
int txfm_buf[4 * 4 + 4 + 4];
inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_4X4, bd);
}
void av1_inv_txfm2d_add_8x8_c(const int32_t *input, uint16_t *output,
- int stride, int tx_type, int bd) {
+ int stride, TX_TYPE tx_type, int bd) {
int txfm_buf[8 * 8 + 8 + 8];
inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_8X8, bd);
}
void av1_inv_txfm2d_add_16x16_c(const int32_t *input, uint16_t *output,
- int stride, int tx_type, int bd) {
+ int stride, TX_TYPE tx_type, int bd) {
int txfm_buf[16 * 16 + 16 + 16];
inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_16X16, bd);
}
void av1_inv_txfm2d_add_32x32_c(const int32_t *input, uint16_t *output,
- int stride, int tx_type, int bd) {
+ int stride, TX_TYPE tx_type, int bd) {
int txfm_buf[32 * 32 + 32 + 32];
inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_32X32, bd);
}
+#if CONFIG_TX64X64
void av1_inv_txfm2d_add_64x64_c(const int32_t *input, uint16_t *output,
- int stride, int tx_type, int bd) {
+ int stride, TX_TYPE tx_type, int bd) {
int txfm_buf[64 * 64 + 64 + 64];
- TXFM_2D_FLIP_CFG cfg = av1_get_inv_txfm_64x64_cfg(tx_type);
- inv_txfm2d_add_c(input, output, stride, &cfg, txfm_buf, bd);
+ inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_64X64, bd);
+}
+
+void av1_inv_txfm2d_add_64x32_c(const int32_t *input, uint16_t *output,
+ int stride, TX_TYPE tx_type, int bd) {
+#if CONFIG_TXMG
+ int txfm_buf[64 * 32 + 64 + 64];
+ int32_t rinput[64 * 32];
+ uint16_t routput[64 * 32];
+ TX_SIZE tx_size = TX_64X32;
+ TX_SIZE rtx_size = av1_rotate_tx_size(tx_size);
+ TX_TYPE rtx_type = av1_rotate_tx_type(tx_type);
+ int w = tx_size_wide[tx_size];
+ int h = tx_size_high[tx_size];
+ int rw = h;
+ int rh = w;
+ transpose_int32(rinput, rw, input, w, w, h);
+ transpose_uint16(routput, rw, output, stride, w, h);
+ inv_txfm2d_add_facade(rinput, routput, rw, txfm_buf, rtx_type, rtx_size, bd);
+ transpose_uint16(output, stride, routput, rw, rw, rh);
+#else
+ int txfm_buf[64 * 32 + 64 + 64];
+ inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_64X32, bd);
+#endif
+}
+
+void av1_inv_txfm2d_add_32x64_c(const int32_t *input, uint16_t *output,
+ int stride, TX_TYPE tx_type, int bd) {
+ int txfm_buf[64 * 32 + 64 + 64];
+ inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_32X64, bd);
}
+#endif // CONFIG_TX64X64