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| author | Moonchild <mcwerewolf@gmail.com> | 2018-10-02 00:21:32 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-10-02 00:21:32 +0200 |
| commit | 69d83c8fbe47b89d1d14f75ee99e638cbfb5dc31 (patch) | |
| tree | ce4b486ac8e13e1f5a8a918e532826c3ae09415d /media/ffvpx/libavutil/x86/x86util.asm | |
| parent | 8e8fcee4a55de171303ebe526d3cf051522111bf (diff) | |
| parent | 41ccd52bfd7f3604d3ad3917af5f030994e13762 (diff) | |
| download | UXP-69d83c8fbe47b89d1d14f75ee99e638cbfb5dc31.tar UXP-69d83c8fbe47b89d1d14f75ee99e638cbfb5dc31.tar.gz UXP-69d83c8fbe47b89d1d14f75ee99e638cbfb5dc31.tar.lz UXP-69d83c8fbe47b89d1d14f75ee99e638cbfb5dc31.tar.xz UXP-69d83c8fbe47b89d1d14f75ee99e638cbfb5dc31.zip | |
Merge pull request #806 from trav90/ffvpx-resync
Update ffvpx code to 4.0.2 (take 2)
Diffstat (limited to 'media/ffvpx/libavutil/x86/x86util.asm')
| -rw-r--r-- | media/ffvpx/libavutil/x86/x86util.asm | 50 |
1 files changed, 34 insertions, 16 deletions
diff --git a/media/ffvpx/libavutil/x86/x86util.asm b/media/ffvpx/libavutil/x86/x86util.asm index e1220dfc1..d7cd99684 100644 --- a/media/ffvpx/libavutil/x86/x86util.asm +++ b/media/ffvpx/libavutil/x86/x86util.asm @@ -357,7 +357,7 @@ %endif %endmacro -%macro ABSB 2 ; source mmreg, temp mmreg (unused for ssse3) +%macro ABSB 2 ; source mmreg, temp mmreg (unused for SSSE3) %if cpuflag(ssse3) pabsb %1, %1 %else @@ -381,7 +381,7 @@ %endif %endmacro -%macro ABSD2_MMX 4 +%macro ABSD2 4 pxor %3, %3 pxor %4, %4 pcmpgtd %3, %1 @@ -475,7 +475,7 @@ %else palignr %1, %2, %3 %endif -%elif cpuflag(mmx) ; [dst,] src1, src2, imm, tmp +%else ; [dst,] src1, src2, imm, tmp %define %%dst %1 %if %0==5 %ifnidn %1, %2 @@ -799,37 +799,47 @@ pminsw %1, %3 %endmacro -%macro PMINSD_MMX 3 ; dst, src, tmp +%macro PMINSD 3 ; dst, src, tmp/unused +%if cpuflag(sse4) + pminsd %1, %2 +%elif cpuflag(sse2) + cvtdq2ps %1, %1 + minps %1, %2 + cvtps2dq %1, %1 +%else mova %3, %2 pcmpgtd %3, %1 pxor %1, %2 pand %1, %3 pxor %1, %2 +%endif %endmacro -%macro PMAXSD_MMX 3 ; dst, src, tmp +%macro PMAXSD 3 ; dst, src, tmp/unused +%if cpuflag(sse4) + pmaxsd %1, %2 +%else mova %3, %1 pcmpgtd %3, %2 pand %1, %3 pandn %3, %2 por %1, %3 +%endif %endmacro -%macro CLIPD_MMX 3-4 ; src/dst, min, max, tmp - PMINSD_MMX %1, %3, %4 - PMAXSD_MMX %1, %2, %4 -%endmacro - -%macro CLIPD_SSE2 3-4 ; src/dst, min (float), max (float), unused +%macro CLIPD 3-4 +%if cpuflag(sse4); src/dst, min, max, unused + pminsd %1, %3 + pmaxsd %1, %2 +%elif cpuflag(sse2) ; src/dst, min (float), max (float), unused cvtdq2ps %1, %1 minps %1, %3 maxps %1, %2 cvtps2dq %1, %1 -%endmacro - -%macro CLIPD_SSE41 3-4 ; src/dst, min, max, unused - pminsd %1, %3 - pmaxsd %1, %2 +%else ; src/dst, min, max, tmp + PMINSD %1, %3, %4 + PMAXSD %1, %2, %4 +%endif %endmacro %macro VBROADCASTSS 2 ; dst xmm/ymm, src m32/xmm @@ -880,6 +890,14 @@ %endif %endmacro +%macro VBROADCASTI128 2 ; dst xmm/ymm, src : 128bits val +%if mmsize > 16 + vbroadcasti128 %1, %2 +%else + mova %1, %2 +%endif +%endmacro + %macro SHUFFLE_MASK_W 8 %rep 8 %if %1>=0x80 |