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author | Jiaxun Yang <jiaxun.yang@flygoat.com> | 2020-05-12 12:40:08 +0800 |
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committer | Jiaxun Yang <jiaxun.yang@flygoat.com> | 2020-05-14 16:31:57 +0800 |
commit | 98620e3c1e67d60b4a338ba7fe2fa1fd885357b6 (patch) | |
tree | 5fb70107a9a1d038ea3a8896ca4f8b63ca61ec20 /js/src/jit | |
parent | 6b56185c0b77cb4b3756fdd4b517b74c77c90afc (diff) | |
download | UXP-98620e3c1e67d60b4a338ba7fe2fa1fd885357b6.tar UXP-98620e3c1e67d60b4a338ba7fe2fa1fd885357b6.tar.gz UXP-98620e3c1e67d60b4a338ba7fe2fa1fd885357b6.tar.lz UXP-98620e3c1e67d60b4a338ba7fe2fa1fd885357b6.tar.xz UXP-98620e3c1e67d60b4a338ba7fe2fa1fd885357b6.zip |
Bug 1271968 - IonMonkey: MIPS: Merge MacroAssembler::branchWithCode.
Tag: #1542
Diffstat (limited to 'js/src/jit')
-rw-r--r-- | js/src/jit/mips-shared/MacroAssembler-mips-shared.cpp | 73 | ||||
-rw-r--r-- | js/src/jit/mips-shared/MacroAssembler-mips-shared.h | 1 | ||||
-rw-r--r-- | js/src/jit/mips32/MacroAssembler-mips32.cpp | 59 | ||||
-rw-r--r-- | js/src/jit/mips32/MacroAssembler-mips32.h | 1 | ||||
-rw-r--r-- | js/src/jit/mips64/MacroAssembler-mips64.cpp | 60 | ||||
-rw-r--r-- | js/src/jit/mips64/MacroAssembler-mips64.h | 1 |
6 files changed, 67 insertions, 128 deletions
diff --git a/js/src/jit/mips-shared/MacroAssembler-mips-shared.cpp b/js/src/jit/mips-shared/MacroAssembler-mips-shared.cpp index 97660299a..0f47e3bfb 100644 --- a/js/src/jit/mips-shared/MacroAssembler-mips-shared.cpp +++ b/js/src/jit/mips-shared/MacroAssembler-mips-shared.cpp @@ -643,6 +643,65 @@ MacroAssemblerMIPSShared::ma_store_unaligned(Register data, const BaseIndex& des } } +void +MacroAssemblerMIPSShared::branchWithCode(InstImm code, Label* label, JumpKind jumpKind) +{ + MOZ_ASSERT(code.encode() != InstImm(op_regimm, zero, rt_bgezal, BOffImm16(0)).encode()); + InstImm inst_beq = InstImm(op_beq, zero, zero, BOffImm16(0)); + + if (label->bound()) { + int32_t offset = label->offset() - m_buffer.nextOffset().getOffset(); + + if (BOffImm16::IsInRange(offset)) + jumpKind = ShortJump; + + if (jumpKind == ShortJump) { + MOZ_ASSERT(BOffImm16::IsInRange(offset)); + code.setBOffImm16(BOffImm16(offset)); + writeInst(code.encode()); + as_nop(); + return; + } + + if (code.encode() == inst_beq.encode()) { + // Handle mixed jump + addMixedJump(nextOffset(), ImmPtr((void*)label->offset())); + as_j(JOffImm26(0)); + as_nop(); + return; + } + + // Handle long conditional branch + writeInst(invertBranch(code, BOffImm16(4 * sizeof(uint32_t))).encode()); + as_nop(); + addMixedJump(nextOffset(), ImmPtr((void*)label->offset())); + as_j(JOffImm26(0)); + as_nop(); + return; + } + + // Generate mixed jump and link it to a label. + + // Second word holds a pointer to the next branch in label's chain. + uint32_t nextInChain = label->used() ? label->offset() : LabelBase::INVALID_OFFSET; + + // Make the whole branch continous in the buffer. + m_buffer.ensureSpace(4 * sizeof(uint32_t)); + + if (jumpKind == ShortJump) { + // Indicate that this is short jump with offset 4. + code.setBOffImm16(BOffImm16(4)); + } + BufferOffset bo = writeInst(code.encode()); + writeInst(nextInChain); + if (!oom()) + label->use(bo.getOffset()); + if (jumpKind != ShortJump && code.encode() != inst_beq.encode()) { + as_nop(); + as_nop(); + } +} + // Branches when done from within mips-specific code. void MacroAssemblerMIPSShared::ma_b(Register lhs, Register rhs, Label* label, Condition c, JumpKind jumpKind) @@ -650,7 +709,7 @@ MacroAssemblerMIPSShared::ma_b(Register lhs, Register rhs, Label* label, Conditi switch (c) { case Equal : case NotEqual: - asMasm().branchWithCode(getBranchCode(lhs, rhs, c), label, jumpKind); + branchWithCode(getBranchCode(lhs, rhs, c), label, jumpKind); break; case Always: ma_b(label, jumpKind); @@ -660,11 +719,11 @@ MacroAssemblerMIPSShared::ma_b(Register lhs, Register rhs, Label* label, Conditi case Signed: case NotSigned: MOZ_ASSERT(lhs == rhs); - asMasm().branchWithCode(getBranchCode(lhs, c), label, jumpKind); + branchWithCode(getBranchCode(lhs, c), label, jumpKind); break; default: Condition cond = ma_cmp(ScratchRegister, lhs, rhs, c); - asMasm().branchWithCode(getBranchCode(ScratchRegister, cond), label, jumpKind); + branchWithCode(getBranchCode(ScratchRegister, cond), label, jumpKind); break; } } @@ -679,7 +738,7 @@ MacroAssemblerMIPSShared::ma_b(Register lhs, Imm32 imm, Label* label, Condition else if (c == Below) ; // This condition is always false. No branch required. else - asMasm().branchWithCode(getBranchCode(lhs, c), label, jumpKind); + branchWithCode(getBranchCode(lhs, c), label, jumpKind); } else { MOZ_ASSERT(lhs != ScratchRegister); ma_li(ScratchRegister, imm); @@ -716,7 +775,7 @@ template void MacroAssemblerMIPSShared::ma_b<ImmTag>(Register lhs, ImmTag rhs, void MacroAssemblerMIPSShared::ma_b(Label* label, JumpKind jumpKind) { - asMasm().branchWithCode(getBranchCode(BranchIsJump), label, jumpKind); + branchWithCode(getBranchCode(BranchIsJump), label, jumpKind); } void @@ -1122,7 +1181,7 @@ MacroAssemblerMIPSShared::ma_bc1s(FloatRegister lhs, FloatRegister rhs, Label* l { FloatTestKind testKind; compareFloatingPoint(SingleFloat, lhs, rhs, c, &testKind, fcc); - asMasm().branchWithCode(getBranchCode(testKind, fcc), label, jumpKind); + branchWithCode(getBranchCode(testKind, fcc), label, jumpKind); } void @@ -1131,7 +1190,7 @@ MacroAssemblerMIPSShared::ma_bc1d(FloatRegister lhs, FloatRegister rhs, Label* l { FloatTestKind testKind; compareFloatingPoint(DoubleFloat, lhs, rhs, c, &testKind, fcc); - asMasm().branchWithCode(getBranchCode(testKind, fcc), label, jumpKind); + branchWithCode(getBranchCode(testKind, fcc), label, jumpKind); } void diff --git a/js/src/jit/mips-shared/MacroAssembler-mips-shared.h b/js/src/jit/mips-shared/MacroAssembler-mips-shared.h index b761c3e9e..304610991 100644 --- a/js/src/jit/mips-shared/MacroAssembler-mips-shared.h +++ b/js/src/jit/mips-shared/MacroAssembler-mips-shared.h @@ -148,6 +148,7 @@ class MacroAssemblerMIPSShared : public Assembler void ma_mod_mask(Register src, Register dest, Register hold, Register remain, int32_t shift, Label* negZero = nullptr); + void branchWithCode(InstImm code, Label* label, JumpKind jumpKind); // branches when done from within mips-specific code void ma_b(Register lhs, Register rhs, Label* l, Condition c, JumpKind jumpKind = MixedJump); void ma_b(Register lhs, Imm32 imm, Label* l, Condition c, JumpKind jumpKind = MixedJump); diff --git a/js/src/jit/mips32/MacroAssembler-mips32.cpp b/js/src/jit/mips32/MacroAssembler-mips32.cpp index 5b9b835ce..46e52f132 100644 --- a/js/src/jit/mips32/MacroAssembler-mips32.cpp +++ b/js/src/jit/mips32/MacroAssembler-mips32.cpp @@ -504,65 +504,6 @@ MacroAssemblerMIPS::ma_b(Address addr, ImmGCPtr imm, Label* label, Condition c, } void -MacroAssemblerMIPS::branchWithCode(InstImm code, Label* label, JumpKind jumpKind) -{ - MOZ_ASSERT(code.encode() != InstImm(op_regimm, zero, rt_bgezal, BOffImm16(0)).encode()); - InstImm inst_beq = InstImm(op_beq, zero, zero, BOffImm16(0)); - - if (label->bound()) { - int32_t offset = label->offset() - m_buffer.nextOffset().getOffset(); - - if (BOffImm16::IsInRange(offset)) - jumpKind = ShortJump; - - if (jumpKind == ShortJump) { - MOZ_ASSERT(BOffImm16::IsInRange(offset)); - code.setBOffImm16(BOffImm16(offset)); - writeInst(code.encode()); - as_nop(); - return; - } - - if (code.encode() == inst_beq.encode()) { - // Handle mixed jump - addMixedJump(nextOffset(), ImmPtr((void*)label->offset())); - as_j(JOffImm26(0)); - as_nop(); - return; - } - - // Handle long conditional branch - writeInst(invertBranch(code, BOffImm16(4 * sizeof(uint32_t))).encode()); - as_nop(); - addMixedJump(nextOffset(), ImmPtr((void*)label->offset())); - as_j(JOffImm26(0)); - as_nop(); - return; - } - - // Generate open jump and link it to a label. - - // Second word holds a pointer to the next branch in label's chain. - uint32_t nextInChain = label->used() ? label->offset() : LabelBase::INVALID_OFFSET; - - // Make the whole branch continous in the buffer. - m_buffer.ensureSpace(4 * sizeof(uint32_t)); - - if (jumpKind == ShortJump) { - // Indicate that this is short jump with offset 4. - code.setBOffImm16(BOffImm16(4)); - } - BufferOffset bo = writeInst(code.encode()); - writeInst(nextInChain); - if (!oom()) - label->use(bo.getOffset()); - if (jumpKind != ShortJump && code.encode() != inst_beq.encode()) { - as_nop(); - as_nop(); - } -} - -void MacroAssemblerMIPS::ma_cmp_set(Register rd, Register rs, Address addr, Condition c) { ma_lw(ScratchRegister, addr); diff --git a/js/src/jit/mips32/MacroAssembler-mips32.h b/js/src/jit/mips32/MacroAssembler-mips32.h index fcb1d3c3b..69e7c4fe5 100644 --- a/js/src/jit/mips32/MacroAssembler-mips32.h +++ b/js/src/jit/mips32/MacroAssembler-mips32.h @@ -89,7 +89,6 @@ class MacroAssemblerMIPS : public MacroAssemblerMIPSShared void ma_pop(Register r); void ma_push(Register r); - void branchWithCode(InstImm code, Label* label, JumpKind jumpKind); // branches when done from within mips-specific code void ma_b(Register lhs, ImmWord imm, Label* l, Condition c, JumpKind jumpKind = MixedJump) { diff --git a/js/src/jit/mips64/MacroAssembler-mips64.cpp b/js/src/jit/mips64/MacroAssembler-mips64.cpp index ee6dd9d0a..79ad8ce4a 100644 --- a/js/src/jit/mips64/MacroAssembler-mips64.cpp +++ b/js/src/jit/mips64/MacroAssembler-mips64.cpp @@ -757,66 +757,6 @@ MacroAssemblerMIPS64::ma_b(Address addr, ImmGCPtr imm, Label* label, Condition c } void -MacroAssemblerMIPS64::branchWithCode(InstImm code, Label* label, JumpKind jumpKind) -{ - MOZ_ASSERT(code.encode() != InstImm(op_regimm, zero, rt_bgezal, BOffImm16(0)).encode()); - InstImm inst_beq = InstImm(op_beq, zero, zero, BOffImm16(0)); - - if (label->bound()) { - int32_t offset = label->offset() - m_buffer.nextOffset().getOffset(); - - if (BOffImm16::IsInRange(offset)) - jumpKind = ShortJump; - - if (jumpKind == ShortJump) { - MOZ_ASSERT(BOffImm16::IsInRange(offset)); - code.setBOffImm16(BOffImm16(offset)); - writeInst(code.encode()); - as_nop(); - return; - } - - if (code.encode() == inst_beq.encode()) { - // Handle mixed jump - addMixedJump(nextOffset(), ImmPtr((void*)label->offset())); - as_j(JOffImm26(0)); - as_nop(); - return; - } - - // Handle long conditional branch, the target offset is based on self, - // point to next instruction of nop at below. - writeInst(invertBranch(code, BOffImm16(4 * sizeof(uint32_t))).encode()); - as_nop(); - addMixedJump(nextOffset(), ImmPtr((void*)label->offset())); - as_j(JOffImm26(0)); - as_nop(); - return; - } - - // Generate open jump and link it to a label. - - // Second word holds a pointer to the next branch in label's chain. - uint32_t nextInChain = label->used() ? label->offset() : LabelBase::INVALID_OFFSET; - - // Make the whole branch continous in the buffer. - m_buffer.ensureSpace(4 * sizeof(uint32_t)); - - if (jumpKind == ShortJump) { - // Indicate that this is short jump with offset 4. - code.setBOffImm16(BOffImm16(4)); - } - BufferOffset bo = writeInst(code.encode()); - writeInst(nextInChain); - if (!oom()) - label->use(bo.getOffset()); - if (jumpKind != ShortJump && code.encode() != inst_beq.encode()) { - as_nop(); - as_nop(); - } -} - -void MacroAssemblerMIPS64::ma_cmp_set(Register rd, Register rs, ImmWord imm, Condition c) { if (imm.value == 0) { diff --git a/js/src/jit/mips64/MacroAssembler-mips64.h b/js/src/jit/mips64/MacroAssembler-mips64.h index 900ff32ab..027ef4063 100644 --- a/js/src/jit/mips64/MacroAssembler-mips64.h +++ b/js/src/jit/mips64/MacroAssembler-mips64.h @@ -115,7 +115,6 @@ class MacroAssemblerMIPS64 : public MacroAssemblerMIPSShared void ma_pop(Register r); void ma_push(Register r); - void branchWithCode(InstImm code, Label* label, JumpKind jumpKind); // branches when done from within mips-specific code void ma_b(Register lhs, ImmWord imm, Label* l, Condition c, JumpKind jumpKind = MixedJump); void ma_b(Register lhs, Address addr, Label* l, Condition c, JumpKind jumpKind = MixedJump); |