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authorJiaxun Yang <jiaxun.yang@flygoat.com>2020-05-12 12:40:13 +0800
committerMoonchild <moonchild@palemoon.org>2020-05-20 14:03:04 +0000
commitf411e027165e7d95a6119d8dabbc15e4f3a206e8 (patch)
treef599523af694eab863e9c22be2e26f434c4ba15d /js/src/jit/mips64
parenta34d02924c825b17af0fd505d8fdb890d5ae5dc1 (diff)
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Bug 1330942 - move MemoryAccessDesc::isUnaligned to the ARM/MIPS platform layer
Tag: #1542
Diffstat (limited to 'js/src/jit/mips64')
-rw-r--r--js/src/jit/mips64/CodeGenerator-mips64.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/js/src/jit/mips64/CodeGenerator-mips64.cpp b/js/src/jit/mips64/CodeGenerator-mips64.cpp
index 45f0e69d7..d1b6a7a32 100644
--- a/js/src/jit/mips64/CodeGenerator-mips64.cpp
+++ b/js/src/jit/mips64/CodeGenerator-mips64.cpp
@@ -449,7 +449,7 @@ CodeGeneratorMIPS64::emitWasmLoadI64(T* lir)
masm.memoryBarrier(mir->access().barrierBefore());
- if (mir->access().isUnaligned()) {
+ if (IsUnaligned(mir->access())) {
Register temp = ToRegister(lir->getTemp(1));
masm.ma_load_unaligned(ToOutRegister64(lir).reg, BaseIndex(HeapReg, ptr, TimesOne),
@@ -514,7 +514,7 @@ CodeGeneratorMIPS64::emitWasmStoreI64(T* lir)
masm.memoryBarrier(mir->access().barrierBefore());
- if (mir->access().isUnaligned()) {
+ if (IsUnaligned(mir->access())) {
Register temp = ToRegister(lir->getTemp(1));
masm.ma_store_unaligned(ToRegister64(lir->value()).reg, BaseIndex(HeapReg, ptr, TimesOne),