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author | Jiaxun Yang <jiaxun.yang@flygoat.com> | 2020-05-12 12:40:07 +0800 |
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committer | Moonchild <moonchild@palemoon.org> | 2020-05-20 14:00:59 +0000 |
commit | 3fb8648bed83c95f601d2c2e20962cbd08bc7dc7 (patch) | |
tree | 2de25a180e7fd42a82be6aad4c8db98ae24d32cf /js/src/jit/mips64/Assembler-mips64.cpp | |
parent | f18d78dea035c5291984d1c468336d20dc0b47b7 (diff) | |
download | UXP-3fb8648bed83c95f601d2c2e20962cbd08bc7dc7.tar UXP-3fb8648bed83c95f601d2c2e20962cbd08bc7dc7.tar.gz UXP-3fb8648bed83c95f601d2c2e20962cbd08bc7dc7.tar.lz UXP-3fb8648bed83c95f601d2c2e20962cbd08bc7dc7.tar.xz UXP-3fb8648bed83c95f601d2c2e20962cbd08bc7dc7.zip |
Bug 1271968 - IonMonkey: MIPS: Replace long jumps by mixed jumps.
Tag: #1542
Diffstat (limited to 'js/src/jit/mips64/Assembler-mips64.cpp')
-rw-r--r-- | js/src/jit/mips64/Assembler-mips64.cpp | 105 |
1 files changed, 24 insertions, 81 deletions
diff --git a/js/src/jit/mips64/Assembler-mips64.cpp b/js/src/jit/mips64/Assembler-mips64.cpp index 4d251f152..6d7636309 100644 --- a/js/src/jit/mips64/Assembler-mips64.cpp +++ b/js/src/jit/mips64/Assembler-mips64.cpp @@ -87,7 +87,9 @@ js::jit::SA(FloatRegister r) void jit::PatchJump(CodeLocationJump& jump_, CodeLocationLabel label, ReprotectCode reprotect) { - Instruction* inst = (Instruction*)jump_.raw(); + Instruction* inst; + + inst = AssemblerMIPSShared::GetInstructionImmediateFromJump((Instruction*)jump_.raw()); // Six instructions used in load 64-bit imm. MaybeAutoWritableJitCode awjc(inst, 6 * sizeof(uint32_t), reprotect); @@ -125,23 +127,6 @@ jit::PatchBackedge(CodeLocationJump& jump, CodeLocationLabel label, } } -void -Assembler::executableCopy(uint8_t* buffer) -{ - MOZ_ASSERT(isFinished); - m_buffer.executableCopy(buffer); - - // Patch all long jumps during code copy. - for (size_t i = 0; i < longJumps_.length(); i++) { - Instruction* inst = (Instruction*) ((uintptr_t)buffer + longJumps_[i]); - - uint64_t value = Assembler::ExtractLoad64Value(inst); - Assembler::UpdateLoad64Value(inst, (uint64_t)buffer + value); - } - - AutoFlushICache::setRange(uintptr_t(buffer), m_buffer.size()); -} - uintptr_t Assembler::GetPointer(uint8_t* instPtr) { @@ -247,8 +232,12 @@ void Assembler::bind(InstImm* inst, uintptr_t branch, uintptr_t target) { int64_t offset = target - branch; - InstImm inst_bgezal = InstImm(op_regimm, zero, rt_bgezal, BOffImm16(0)); - InstImm inst_beq = InstImm(op_beq, zero, zero, BOffImm16(0)); + + // Generate the patchable mixed jump for call. + if (inst->extractOpcode() == ((uint32_t)op_jal >> OpcodeShift)) { + addMixedJump(BufferOffset(branch), ImmPtr((void*)target)); + return; + } // If encoded offset is 4, then the jump must be short if (BOffImm16(inst[0]).decode() == 4) { @@ -258,47 +247,14 @@ Assembler::bind(InstImm* inst, uintptr_t branch, uintptr_t target) return; } - // Generate the long jump for calls because return address has to be the - // address after the reserved block. - if (inst[0].encode() == inst_bgezal.encode()) { - addLongJump(BufferOffset(branch)); - Assembler::WriteLoad64Instructions(inst, ScratchRegister, target); - inst[4] = InstReg(op_special, ScratchRegister, zero, ra, ff_jalr).encode(); - // There is 1 nop after this. - return; - } - if (BOffImm16::IsInRange(offset)) { - // Don't skip trailing nops can improve performance - // on Loongson3 platform. - bool skipNops = !isLoongson() && (inst[0].encode() != inst_bgezal.encode() && - inst[0].encode() != inst_beq.encode()); - inst[0].setBOffImm16(BOffImm16(offset)); inst[1].makeNop(); - if (skipNops) { - inst[2] = InstImm(op_regimm, zero, rt_bgez, BOffImm16(5 * sizeof(uint32_t))).encode(); - // There are 4 nops after this - } return; } - if (inst[0].encode() == inst_beq.encode()) { - // Handle long unconditional jump. - addLongJump(BufferOffset(branch)); - Assembler::WriteLoad64Instructions(inst, ScratchRegister, target); - inst[4] = InstReg(op_special, ScratchRegister, zero, zero, ff_jr).encode(); - // There is 1 nop after this. - } else { - // Handle long conditional jump. - inst[0] = invertBranch(inst[0], BOffImm16(7 * sizeof(uint32_t))); - // No need for a "nop" here because we can clobber scratch. - addLongJump(BufferOffset(branch + sizeof(uint32_t))); - Assembler::WriteLoad64Instructions(&inst[1], ScratchRegister, target); - inst[5] = InstReg(op_special, ScratchRegister, zero, zero, ff_jr).encode(); - // There is 1 nop after this. - } + addMixedJump(BufferOffset(branch), ImmPtr((void*)target)); } void @@ -313,19 +269,16 @@ Assembler::bind(RepatchLabel* label) InstImm inst_beq = InstImm(op_beq, zero, zero, BOffImm16(0)); uint64_t offset = dest.getOffset() - label->offset(); - // If first instruction is lui, then this is a long jump. + // If first instruction is j, then this is a mixed jump. // If second instruction is lui, then this is a loop backedge. - if (inst[0].extractOpcode() == (uint32_t(op_lui) >> OpcodeShift)) { - // For unconditional long branches generated by ma_liPatchable, - // such as under: - // jumpWithpatch - Assembler::UpdateLoad64Value(inst, dest.getOffset()); + if (inst[0].extractOpcode() == (uint32_t(op_j) >> OpcodeShift)) { + // For unconditional mixed branches generated by jumpWithPatch + addMixedJump(b, ImmPtr((void*)dest.getOffset()), MixedJumpPatch::PATCHABLE); } else if (inst[1].extractOpcode() == (uint32_t(op_lui) >> OpcodeShift) || BOffImm16::IsInRange(offset)) { // Handle code produced by: // backedgeJump - // branchWithCode MOZ_ASSERT(BOffImm16::IsInRange(offset)); MOZ_ASSERT(inst[0].extractOpcode() == (uint32_t(op_beq) >> OpcodeShift) || inst[0].extractOpcode() == (uint32_t(op_bne) >> OpcodeShift) || @@ -333,34 +286,25 @@ Assembler::bind(RepatchLabel* label) inst[0].extractOpcode() == (uint32_t(op_bgtz) >> OpcodeShift)); inst[0].setBOffImm16(BOffImm16(offset)); } else if (inst[0].encode() == inst_beq.encode()) { - // Handle open long unconditional jumps created by + // Handle open mixed unconditional jumps created by // MacroAssemblerMIPSShared::ma_b(..., wasm::Trap, ...). - // We need to add it to long jumps array here. + // We need to add it to mixed jumps array here. // See MacroAssemblerMIPS64::branchWithCode(). MOZ_ASSERT(inst[1].encode() == NopInst); - MOZ_ASSERT(inst[2].encode() == NopInst); - MOZ_ASSERT(inst[3].encode() == NopInst); - MOZ_ASSERT(inst[4].encode() == NopInst); - MOZ_ASSERT(inst[5].encode() == NopInst); - addLongJump(BufferOffset(label->offset())); - Assembler::WriteLoad64Instructions(inst, ScratchRegister, dest.getOffset()); - inst[4] = InstReg(op_special, ScratchRegister, zero, zero, ff_jr).encode(); + addMixedJump(b, ImmPtr((void*)dest.getOffset()), MixedJumpPatch::PATCHABLE); + inst[0] = InstJump(op_j, JOffImm26(0)).encode(); } else { - // Handle open long conditional jumps created by + // Handle open mixed conditional jumps created by // MacroAssemblerMIPSShared::ma_b(..., wasm::Trap, ...). - inst[0] = invertBranch(inst[0], BOffImm16(7 * sizeof(uint32_t))); + inst[0] = invertBranch(inst[0], BOffImm16(4 * sizeof(uint32_t))); // No need for a "nop" here because we can clobber scratch. - // We need to add it to long jumps array here. + // We need to add it to mixed jumps array here. // See MacroAssemblerMIPS64::branchWithCode(). MOZ_ASSERT(inst[1].encode() == NopInst); MOZ_ASSERT(inst[2].encode() == NopInst); MOZ_ASSERT(inst[3].encode() == NopInst); - MOZ_ASSERT(inst[4].encode() == NopInst); - MOZ_ASSERT(inst[5].encode() == NopInst); - MOZ_ASSERT(inst[6].encode() == NopInst); - addLongJump(BufferOffset(label->offset() + sizeof(uint32_t))); - Assembler::WriteLoad64Instructions(&inst[1], ScratchRegister, dest.getOffset()); - inst[5] = InstReg(op_special, ScratchRegister, zero, zero, ff_jr).encode(); + addMixedJump(b, ImmPtr((void*)dest.getOffset()), MixedJumpPatch::PATCHABLE); + inst[2] = InstJump(op_j, JOffImm26(0)).encode(); } } label->bind(dest.getOffset()); @@ -492,8 +436,7 @@ Assembler::PatchDataWithValueCheck(CodeLocationLabel label, PatchedImmPtr newVal void Assembler::PatchInstructionImmediate(uint8_t* code, PatchedImmPtr imm) { - InstImm* inst = (InstImm*)code; - Assembler::UpdateLoad64Value(inst, (uint64_t)imm.value); + Assembler::UpdateLoad64Value((Instruction*)code, (uint64_t)imm.value); } uint64_t |